ADVANCED ANALOG-TO-DIGITAL CONVERTER DESIGN STUDIES FOR WIDEDYNAMIC RANGE, GIGASAMPLE CONVERSION RATE, MONOLITHIC

Award Information
Agency: Department of Defense
Branch: Defense Advanced Research Projects Agency
Contract: N/A
Agency Tracking Number: 17222
Amount: $49,386.00
Phase: Phase I
Program: SBIR
Awards Year: 1991
Solicitation Year: N/A
Solicitation Topic Code: N/A
Solicitation Number: N/A
Small Business Information
1069 Elkton Dr, Colorado Springs, CO, 80907
DUNS: N/A
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 () -
Business Contact
Phone: () -
Research Institution
N/A
Abstract
Q-DOT PROPOSES A VERY HIGH-SPEED (10 - 20 GS/S) MEDIUM-RESOLUTION (6-BIT) ANALOG-TO-DIGITAL CONVERTER (ADC) USING AN ADVANCED HETEROJUNCTION BIPOLAR TRANSISTOR (HBT) PROCESS. INNOVATIVE CIRCUIT DESIGN, COMBINED WITH A VERY FAST HBT PROCESS, WILL BE USED TO DESIGN A PRACTICAL WIDE BANDWIDTH CONVERTER. THE DESIGN WILL ACCOUNT FOR THE REDUCED COMPLEXITY REQUIRED BY AN EMERGING TECHNOLOGY BY USING ANALOG ENCODING AT THE INPUT AND GRAY LOGIC DECODING. THIS DESIGN WILL REDUCE THE NUMBER OF INPUT COMPARATORS BY A FACTOR OF TWO TO FOUR, WITH SUBSEQUENT REDUCTION OF THE LOGIC CIRCUIT COMPLEXITY. ANALOG ENCODING MINIMIZES THE LOADING EFFECT OF THE ADC ON THE DRIVING CIRCUITRY AND EASES THE INPUT MATCHING REQUIREMENTS. THE GRAY LOGIC DECODE WILL REDUCE THE BIT ERROR RATE AT HIGH SAMPLE RATES. THE COMBINATION WILL YIELD A VERY FAST (10 - 20 GS/S) MONOLITHIC ADC WITH MODERATE (6-BIT) RESOLUTION. A VERY HIGH-SPEED ADC WILL FIND NUMEROUS APPLICATIONS IN COMMERCIAL AND MILITARY TELECOMMUNICATION SYSTEMS. COMMERCIAL SATELLITE LINKS, INSTRUMENTATION AND HIGH-SPEED DATA TRANSMISSION SYSTEMS WILL ALL BENEFIT. MILITARY RADAR AND EW SYSTEMS CAN BE ENHANCED AND DOWN CONVERTERS SIMPLIFIED BY USING THE WIDE BANDWIDTH OF THIS CONVERTER.

* Information listed above is at the time of submission. *

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