HBT DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER (Q-DOT RESEARCH PROPOSAL 1291)

Award Information
Agency:
Department of Defense
Branch
Air Force
Amount:
$621,000.00
Award Year:
1993
Program:
SBIR
Phase:
Phase II
Contract:
n/a
Award Id:
17797
Agency Tracking Number:
17797
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
1069 Elkton Drlve, Colorado Springs, CO, 80907
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
n/a
Principal Investigator:
Donald L. Herman, Jr.
(719) 590-1112
Business Contact:
() -
Research Institution:
n/a
Abstract
THERE ARE NUMEROUS APPLICATIONS FOR A HIGH-RESOLUTION (16-BIT) AND IN MILITARY AND COMMERCIAL COMMUNICATIONS, PHASED-ARRAY RADAR# AND ELECTRONIC WARFARE SYATEMS. G-DOT PROPOSES A HIGH-RESOLUTION (16- TO 18-BIT) ' 100 MS/S BHT DELTA-SIGMA A^D CONVERTER. A MULTIBIT ARCHITECTURE REDUCES THE OVERSAMPLING RATIO FROM 1000:1 TO 50:1 (FOR 16 BITS)# MINIMIZING THE TECHNICAL RISK. THE REDUCED CLOCK RATE AND THE MONOLITHIC APPROACH LOWERS THE A/D POWER REQUIREMENTS. THE DELTA-SIGMA ARCHITECTURE PROVIDES INSENSITIVITY TO PROCESS VARIATIONS# IMPROVING DEVICE YIELD. ON-CHIP DEMULTIPLEXING MAY BE USED TO PROVIDE INITIAL DECIMATION AS WELL, REDUCING THE DATA RATE FROM THE DELTA-SIGMA MODULATORS INTO THE DIGITAL FILTERS. THESE FEATURES ENHANCE THE DESIGN'S USEFULNESS FOR ANTENNA ARRAYS WHERE LARGE NUMBERS OF A^D'S MAY BE REQUIRED. A UNIQUE INPUT BUFFER ALSO SERVES AS THE MODULATOR FILTER AND DIFFERENCE AMPLIFIER. AN INNOVATIVE A/D-D^A DESIGN WILL CREATE A VERY-HIGH-SPEED BUILDING BLOCK USEFUL FOR SUBRANGING A/D'S AS WELL AS THE PROPOSED DELTA-SIGMA A/D. THIS BUILDING-BLOCK ALSO HAS APPLICATIONS IN RF FRONT ENDS# PROVIDING RAPID GAIN-CONTROL FEEDBACK FOR AGC OR SIGNAL DEMODULATION/DETECTION. DURING PHASE I, PRELIMINARY CELL DESIGNS WILL BE EVALUATED AND THE A/D'S PERFORMANCE ESTIMATED. A STATE-OF-THE-ART INP MET PROCESS WILL BE USED TO PRODUCE PROTOTYPES DURING PHASE II.

* information listed above is at the time of submission.

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