Ultra-Low-Power, Charge-Mode Digital Processors (Q_DOT Research Proposal 1349)

Award Information
Agency:
Department of Defense
Branch
Air Force
Amount:
$375,000.00
Award Year:
1994
Program:
SBIR
Phase:
Phase II
Contract:
n/a
Agency Tracking Number:
20026
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
Q-dot, Inc.
1069 Elkton Drive, Colorado Springs, CO, 98090
Hubzone Owned:
N
Socially and Economically Disadvantaged:
N
Woman Owned:
N
Duns:
n/a
Principal Investigator:
Thomas E. Linnenbrink
(719) 590-1112
Business Contact:
() -
Research Institution:
n/a
Abstract
Q-DOT proposes to develop ultra-low-power charge-mode digital processors for use in advanced packaging technologies. Initial estimates project a reduction factor of 10 to 30 in power dissipation when state-of-the-art CMOS is replaced with advanced, charge-mode logic. For example, a 32-bit serial shift built with 1um design rules and operating at 200 MHz and 5V power will dissipate 5 mW in charge mode logic and 180 mW in CMOS. While the 36:1 factor can not be maintained in more complex functions, a 10:1 ratio appears to be feasible. During Phase I, meaningful processor architectures will be developed in charge-mode logic. Their performance will be simulated. In Phase II proof-of-concept processor elements will be built.

* information listed above is at the time of submission.

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