Delta-Sigma Radar Receiver
Department of Defense
Defense Advanced Research Projects Agency
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Small Business Information
1069 Elkton Dr., Colorado Springs, CO, 80907
Socially and Economically Disadvantaged:
AbstractQ-Dot proposes to develop a wideband digital radar receiver outputting multiple simultaneous channels with 10 MHz bandwidth and 80 dB of spurious free dynamic range each. Q-Dot is teaming with Raytheon Electronics Systems to ensure the successful design of the Delta-Sigma Radar Receiver which meets the advanced specifications of Naval Research Labs' Future Surveillance Radar (FSR). The Delta-Sigma Radar Receiver architecture directly samples a wideband signal centered at 1.3 GHz using a bandpass delta-sigma modulation scheme. The one-bit modulator output is innovatively used to simplify channelization and downconversion. Much of the Phase I development is focused on the channelizers' high-speed digital local oscillator and highly oversampled decimation filtering architectures. In Phase II, the architecture will be implemented on several integrated circuits in an advanced SiGe HBT/CMOS process and packaged in a large multichip module (MCM). In conjunction with Raytheon, the Delta-Sigma Radar Receiver MCMwill be integrated with an existing system for performance evaluation and comparison with other receivers. Upon successful completion of Phase II, the Delta-Sigma Radar Receiver will be completed during Phase III for full integration with the FSR.
* information listed above is at the time of submission.