Integrated Optic Gas Sensors for Real Time Monitoring of Hazardous Chemicals in a Fire/Thermal/Smoke Environment

Award Information
Agency:
Department of Defense
Branch
Army
Amount:
$729,971.00
Award Year:
2001
Program:
SBIR
Phase:
Phase II
Contract:
DAAD17-01-C-0002
Award Id:
48461
Agency Tracking Number:
A992-1641
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
1069 Elkton Drive, Colorado Springs, CO, 80907
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
089808760
Principal Investigator:
MichaelHarrell
Mgr,RF & Optical Systems
(719) 590-1112
ken_graves@chiinc.com
Business Contact:
ThomasLinnenbrink
President & Technical Dir
() -
ken_graves@chiinc.com
Research Institute:
n/a
Abstract
Q-DOT proposes to develop a wide bandwidth, highly versatile Direct Digital Synthesizer (DDS) System capable of supporting multiple radar and communication systems. A common, highly capable DDS System will simplify logistics, training and maintenance,thereby significantly reducing Operation and Support Cost. Bar-Giora Goldberg, co-founder of Sciteq, and world-renown DDS innovator, will guide the DDS architectural design. A single DDS System will provide 2 GHz of bandwidth with a robust menu of modulations (FSK, PSK, QPSK, QAM) and <60 dB spurious free dynamic range (SFDR). The DDS System will be realized with IBM's production SiGe BiCMOS process that combinesadvanced HBT with state-of-the-art CMOS to produce sophisticated yet inexpensive mixed-signal integrated circuits. This effort will build on Q-DOT's experience in designing and building SiGe MMIC's, including VCO, PPL, active mixer, ADC, and DAC. The proposed DAC portion of the DDS system will be based on an existing part designed to achieve 14-bit, 5 Gs/s,>80 dBSFDR and realized at Q-DOT in SiGe BiCMOS. Phase II will result in a robust DDS ready for fabrication. The DDS chip will be fabricated and packaged with the existing DAC to yield deliverable DDS systems suitable for evaluation. The DAC will be refined in Phase IIIA to improve its performanceand compatibility with the DDS chip. The DDS chip will be enhanced in Phase IIIB to incorporate DAC compensation circuitry. Finally, the DAC will be dynamically compensated during Phase IIIC to increase its linearity. Two internationally recognizedcompanies have expressed interest in supporting the Phase III effort and bringing the resulting products to market.

* information listed above is at the time of submission.

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