QuickCode Automatic Code and Test Generation Suite for Real-Time Embedded Systems

Award Information
Agency:
Department of Defense
Branch
Navy
Amount:
$68,125.00
Award Year:
2007
Program:
SBIR
Phase:
Phase I
Contract:
N00039-07-C-0077
Agency Tracking Number:
N072-145-0094
Solicitation Year:
2007
Solicitation Topic Code:
N07-145
Solicitation Number:
2007.2
Small Business Information
QUICKFLEX, INC.
8401 N. New Braunfels, Suite 324, San Antonio, TX, 78209
Hubzone Owned:
N
Socially and Economically Disadvantaged:
N
Woman Owned:
N
Duns:
176568772
Principal Investigator:
Steven Smith
PI / Chief Architect
(210) 824-2348
steven.smith@quickflex.com
Business Contact:
Sally Draper
President and CEO
(210) 824-2348
sdraper@quickflex.com
Research Institution:
n/a
Abstract
Sophisticated real-time embedded systems pose a unique challenge to system developers, especially if the system includes a complex mixture of software components and special-purpose hardware, and when the development occurs cooperatively across organizations. QuickFlex, Inc. proposes QuickCode, a flexible, extensible development environment capable of automatically generating standards-compliant software and hardware source code as well as test and validation capabilities for real-time embedded systems. The system will rely upon the Architectural Analysis and Design Language (AADL), a precise formal notation for representing the interface relationships among both the software and the hardware modules that compose a real-time system. Through the use of AADL's property notation a Software Communications Architecture (SCA) virtual machine is implemented as a system simulation model. The simulation model will present a complete implementation of the SCA operating environment and will provide an API for target-specific hardware interfaces outside the scope of the SCA. The team's effort will leverage the Open Source AADL Tool Environment (OSATE), which is in turn built upon the widely used Eclipse tool environment. The tool will generate C, C++, AADL, CORBA IDL, VHDL, SystemC, and Verilog.

* information listed above is at the time of submission.

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