Improved Design of Radiation Hardened, Wide-Temperature Analog and Mixed-Signal Electronics

Award Information
Agency:
National Aeronautics and Space Administration
Branch
n/a
Amount:
$99,907.00
Award Year:
2010
Program:
SBIR
Phase:
Phase I
Contract:
NNX10CF01P
Award Id:
95558
Agency Tracking Number:
094562
Solicitation Year:
n/a
Solicitation Topic Code:
X1
Solicitation Number:
n/a
Small Business Information
215 Wynn Drive, 5th Floor, Huntsville, AL, 35805
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
185169620
Principal Investigator:
Marek Turowski
Principal Investigator
(256) 726-4889
mt@cfdrc.com
Business Contact:
Silvia Harvey
Document Specialist
(256) 726-4858
sxh@cfdrc.com
Research Institution:
n/a
Abstract
NASA space exploration projects require avionic systems, components, and controllers that are capable of operating in the extreme temperature and radiation environments of deep space. To design wide-temperature radiation-hardened (rad-hard) electronics and predict characteristics and reliability in space, advanced models and simulation tools are required at multiple levels. Analog and mixed-signal circuits for space have not been adequately addressed so far. This project aims to design, develop, validate, and demonstrate novel Radiation Hardened By Design (RHBD) analog/mixed-signal integrated circuits (ICs) aimed for the extreme environments of space. In Phase 1, CFDRC in collaboration with Georgia Tech will: (1) enhance and demonstrate the CFDRC's unique physics-based mixed-mode simulation tools (NanoTCAD coupled with Cadence Spectre) for predicting extreme-wide-temperature and transient radiation response of analog/mixed-signal ICs based on silicon-germanium (SiGe) BiCMOS technologies; (2) perform first-ever mixed-mode simulation-based investigation of single-event effects (SEE) in SiGe analog, mixed-signal, and radio-frequency (RF) circuits in wide temperature range, and provide important understanding of currently unexplained physical phenomena behind the experimental radiation/temperature data collected under the NASA Exploration Technology Development Program (ETDP); and (3) develop preliminary RHBD concepts for SEE hardening. In Phase 2, we will demonstrate and validate the improved physics-based models for temperature range from -230oC to +130oC, and apply them to evaluate and develop RHBD designs over the expected operating range. New RHBD devices and analog circuits will be fabricated in prototype chips and tested at wide temperatures and radiation, and delivered as a component library to NASA.

* information listed above is at the time of submission.

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