SI/GE OPTICAL BUS ARRAY AND BINARY FANOUT HOLOGRAM FOR SI-BASED VLSI WAFER-SCALE OPTOELECTRONIC INTERCONNECTS

Award Information
Agency:
Department of Defense
Branch
Missile Defense Agency
Amount:
$59,996.00
Award Year:
1994
Program:
SBIR
Phase:
Phase I
Contract:
n/a
Award Id:
25594
Agency Tracking Number:
25594
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
10306 Sausalito Drive, Austin, TX, 78759
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
n/a
Principal Investigator:
Suning Tang, Phd
(512) 343-1951
Business Contact:
() -
Research Institute:
n/a
Abstract
We propose a dratically new optoelectronic chip modules (OCMs) concepts to optically interconnect Si-based VLSI wafer-scale integrated circuits. Realizing the fact that system clock speed is three to five times higher than that ofprocessor speed, we propose to develop an optical clock signal distribution networks for wafer-scale interconnects. The architecture is to employ a superstrate Si/Ge waveguide array as the optical bus for signal distribution. Implementation of a waveguide layer on top of the Si-based VLS/ULSI circuit is due to the fact that the real estate of the Si wafer is already occupied by high packaging density transistors and logic gates. Broadcasting of clock signal requires another physical layer through which optical signal can be fanned out as requested.

* information listed above is at the time of submission.

Agency Micro-sites


SBA logo

Department of Agriculture logo

Department of Commerce logo

Department of Defense logo

Department of Education logo

Department of Energy logo

Department of Health and Human Services logo

Department of Homeland Security logo

Department of Transportation logo

Enviromental Protection Agency logo

National Aeronautics and Space Administration logo

National Science Foundation logo
US Flag An Official Website of the United States Government