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Wideband Digital Beamforming and Direction Finding

Award Information
Agency: Department of Defense
Branch: Navy
Contract: N00178-04-C-3028
Agency Tracking Number: N032-0731
Amount: $69,648.00
Phase: Phase I
Program: SBIR
Solicitation Topic Code: N/A
Solicitation Number: N/A
Solicitation Year: N/A
Award Year: 2003
Award Start Date (Proposal Award Date): N/A
Award End Date (Contract End Date): N/A
Small Business Information
329 North Bernardo Avenue
Mountain View, CA 94043
United States
DUNS: 626626782
HUBZone Owned: No
Woman Owned: No
Socially and Economically Disadvantaged: No
Principal Investigator
 Steve Bruzzone
 Algorithm Engineering Man
 (650) 988-4723
Business Contact
 Dennis Kanemura
Title: VP, Operations
Phone: (650) 988-4702
Research Institution

Recent advances in Field Programmable Gate Arrays (FPGA's) and Digital Signal Processing (DSP) devices are providing a means for the development and fielding of wideband digital receiver suites for Electronic Support (ES). Digital processing of thesesignals can result in significant improvements in parameter measurements such as Direction of Arrival (DOA), frequency measurement, time of arrival and signal amplitude as well as improved envelope and modulation estimation. Use of advanced digitalprocessing also allows for the implementation of modern interference cancellation algorithms to allow processing of today's high density signal environments containing many overlapping signals.The proposed research will study the feasibility and effectiveness of a novel wideband interference cancellation technique for separating overlapped signals. The technique is based on an extension of existing IFM techniques. It makes use of a series ofco-variance matrices from which a set of eigenvectors can be found. These eigenvectors are used for signal detection, time up, frequency and angle of arrival measurements. These parameters are then used as components of typical pulse descriptor wordsthat can be fed into existing pulse separation and association processors for further downstream processing. Use of FPGA and high speed DSP chips allows these algorithms to be implemented in real time and in a fieldable form factor and in fact, can bereadily inserted into existing systems.

* Information listed above is at the time of submission. *

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