Performance Improvement of a Receiver on a Chip (ROC)
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RESEARCH ASSOC. OF SYRACUSE
6780 Northern Blvd, Ste 100, East Syracuse, NY, 13057
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VP of Finance
AbstractConsiderable effort is applied in the electronic warfare field to reduce the size, cost and power consumption of receiver and detection equipment while increasing their performance. Applications include ELINT, ESM, Radar Warning Receivers, and SIGINT data gathering and processing. These types of receivers have been employed historically on airborne fighter, bomber, and ISR platforms. These receivers are becoming more complex in response to the increasing threat complexity and density. There is a need for continued size reduction, lower costs and increased performance. Of course, these simultaneous demands are at odds with each other. The recent Monobit receiver program undertaken by the Air Force has resulted in a reduced size, wideband, high speed, low bit size A/D with a reduced-complexity, high speed FFT processing core. This processing is intended to be incorporated on a single chip as a receiver on a chip. For AF05-225, "Performance Improvement of a Receiver on a Chip (ROC)", RAS proposes to determine the capability of the Monobit FFT processing core to detect/identify exotic signals. The goal is to use the basic digitized and frequency transformed signal data provided by the Monobit processing to serve as the basis for exotic signal detection.
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