Reliable and Rad-Hard Microelectronics

Award Information
Agency:
Department of Defense
Branch
Air Force
Amount:
$99,984.00
Award Year:
2009
Program:
SBIR
Phase:
Phase I
Contract:
FA9453-09-M-0096
Award Id:
93101
Agency Tracking Number:
F083-197-0497
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
6595 North Oracle Road, Tucson, AZ, 85704
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
157955597
Principal Investigator:
James Hofmeister
Principal Scientist
(520) 742-3300
lang@psicorp.com
Business Contact:
Douglas Goodman
President and CEO
(520) 742-3300
green@psicorp.com
Research Institution:
n/a
Abstract
The ability to measure and characterize critical circuit parameters is a necessary requirement to developing reliable microelectronics for military applications. An industry-first capability is provided: a set of radiation-hardened by design (RHBD) test structures to allow design engineers to measure and characterize these critical parameters both before and after irradiation. Upon completion, these RHBD structures will be added to Ridgetop Groups Design-for-Manufacturing Tools (nanoDFM). Die Level Process Monitor (DLPM) are precise in-situ integrated circuits (ICs) placed onto a die to extract information that measure and characterize key parameters that are very susceptible to manufacturing process variations. Design engineers can then correct for process variations, better center designs, or adaptively correct operation as the IC degrades or becomes irradiated. The DLPM structures are the following: (1) threshold voltage shift, (2) resistance mismatch and (3) capacitance mismatch. There are prognostic cells to detect radiation-induced voltage shifts, increased leakage current and memory cell errors. New structures provide information on Negative Bias Temperature Instability (NBTI) and the effects of process variation and radiation on timings and operations associated gates, voltage references and flip-flop memory cells. These structures will be designed for the IBM 65-nm 10RF bulk Complementary Metal Oxide Semiconductor (CMOS) process node. BENEFIT: Ridgetop Group owns patented DLPM and PDKChek technologies that have been successfully developed and used for larger feature size technologies. For the smaller and lower-power IBM 65-nm 10RF bulk CMOS process, the existing DLPM and the new structures need to be designed, fabricated, tested and documented to provide design engineers with the necessary capability for extracting information to measure and characterize critical circuit parameters, which in turn leads to more reliable microelectronics: circuit designs can be more effectively centered. Radiation-hardened circuit designers will be able to extract the same level of information from a RHBD nanoDFM suite of tools: this is an industry-first capability.

* information listed above is at the time of submission.

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