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Efficient and Accurate Coupled Circuit and Substrate Simulation for Radiation Hard Electronics

Award Information
Agency: Department of Defense
Branch: Defense Threat Reduction Agency
Contract: FA9451-06-C-0383
Agency Tracking Number: T051-001-0178
Amount: $749,737.00
Phase: Phase II
Program: SBIR
Solicitation Topic Code: DTRA05-001
Solicitation Number: 2005.1
Solicitation Year: 2005
Award Year: 2006
Award Start Date (Proposal Award Date): 2006-09-20
Award End Date (Contract End Date): 2008-09-19
Small Business Information
5820 Stoneridge Mall Rd. Suite 100
Pleasanton, CA 94588
United States
DUNS: 170882539
HUBZone Owned: No
Woman Owned: No
Socially and Economically Disadvantaged: No
Principal Investigator
 Klas Lilja
 (925) 847-2073
Business Contact
 Klas Lilja
Title: Manager
Phone: (925) 847-2073
Research Institution

The key innovation of the proposal is a novel, fast and accurate, algorithm (patent pending) to simulate substrate effects, in particular single event transients (SETs), in semiconductor circuits. This new method opens up a new capability for circuit designers to study a large set of substrate and layout related effects using simulation, helps them to make good choices regarding circuit design and layout, and greatly reduces the number of tests/experimental manufacturing lots required. In phase I we developed and demonstrated the novel simulation method. We showed that this method is as accurate as TCAD simulation at the device level, while being much faster (10-100X), and allowing the simulation of circuit response for circuits with 1000’s of transistors. In phase II we will develop this method into a production strength design tool, verify and calibrate simulation models by comparing to measurements, and use the method to investigate and develop novel radhard design concepts, built-in soft error resilience (BiSER), which reduce soft error rates in digital logic, with a minimum of area, power, and speed penalty.

* Information listed above is at the time of submission. *

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