DESIGN STUDY TO IMPLEMENT NASTRAN ON MASSIVELY PARALLEL COMPUTERS

Award Information
Agency:
National Aeronautics and Space Administration
Branch
n/a
Amount:
$47,734.00
Award Year:
1991
Program:
SBIR
Phase:
Phase I
Contract:
n/a
Award Id:
16991
Agency Tracking Number:
16991
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
Po Box 1189, Athens, GA, 30603
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
n/a
Principal Investigator:
() -
Business Contact:
() -
Research Institution:
n/a
Abstract
THE FINITE-ELEMENT APPROACH TO STRUCTURAL ANALYSIS HAS BEEN CONSIDERED EFFICIENT AND COMPREHENSIVE FOR MANY YEARS. THE NASA-DEVELOPED STRUCTURAL ANALYSIS PROGRAM NASTRAN IS IN THE FOREFRONT FOR USE IN SUCH ANALYSES. IN THIS PROJECT, A DESIGN THAT WOULD ALLOW NASTRAN TO WORK EFFICIENTLY ON COMPUTERS THAT HAVE A MASSIVELY PARALLEL ARCHITECTURE WILL BE STUDIED. THE EFFORT WILL INCLUDE AN ANALYSIS OF THE CAPABILITIES OF EXISTING COMPUTERS WITH A MASSIVELY PARALLEL ARCHITECTURE, DETERMINATION OF EFFICIENT MATRIX ALGORITHMS, DETERMINATION OF AREAS OF CODE THAT COULD BE EXECUTED IN PARALLEL, DETERMINATION OF POSSIBLE PARALLELIZATION AT THE NASTRAN COMMAND LANGUAGE LEVEL, AND A DEFINITION OF THE ADDITIONAL NASTRAN I/O FUNCTIONS AND EXECUTIVE CONTROL FUNCTIONS REQUIRED TO INSTALL OPTIMAL PARALLELIZATION TECHNIQUES. THE FINITE-ELEMENT APPROACH TO STRUCTURAL ANALYSIS HAS BEEN CONSIDERED EFFICIENT AND COMPREHENSIVE FOR MANY YEARS. THE NASA-DEVELOPED STRUCTURAL ANALYSIS PROGRAM NASTRAN IS IN THE FOREFRONT FOR USE IN SUCH ANALYSES. IN THIS PROJECT, A DESIGN THAT WOULD ALLOW NASTRAN TO WORK EFFICIENTLY ON COMPUTERS THAT HAVE A MASSIVELY PARALLEL ARCHITECTURE WILL BE STUDIED. THE EFFORT WILL INCLUDE AN ANALYSIS OF THE CAPABILITIES OF EXISTING COMPUTERS WITH A MASSIVELY PARALLEL ARCHITECTURE, DETERMINATION OF EFFICIENT MATRIX ALGORITHMS, DETERMINATION OF AREAS OF CODE THAT COULD BE EXECUTED IN PARALLEL, DETERMINATION OF POSSIBLE PARALLELIZATION AT THE NASTRAN COMMAND LANGUAGE LEVEL, AND A DEFINITION OF THE ADDITIONAL NASTRAN I/O FUNCTIONS AND EXECUTIVE CONTROL FUNCTIONS REQUIRED TO INSTALL OPTIMAL PARALLELIZATION TECHNIQUES.

* information listed above is at the time of submission.

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