A LARGE SIGNAL NONLINEAR CIRCUIT MODEL FOR COMPOUND SEMICONDUCTOR FIELD EFFECT TRANSISTOR

Award Information
Agency: National Science Foundation
Branch: N/A
Contract: N/A
Agency Tracking Number: 10706
Amount: $50,000.00
Phase: Phase I
Program: SBIR
Awards Year: 1989
Solicitation Year: N/A
Solicitation Topic Code: N/A
Solicitation Number: N/A
Small Business Information
Po Box 1058, 50 Nye Rd, Glastonbury, CT, 06033
DUNS: N/A
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Harold L Grubin
 Principal Investigator
 (203) 659-0333
Business Contact
Phone: () -
Research Institution
N/A
Abstract
DURING THE PAST DECADE THERE HAS BEEN AN INCREASE IN THE DESIGN AND COMPLEXITY OF COMPOUND SEMICONDUCTOR DEVICES AND SYSTEMS. FOR THESE DEVICES AND SYSTEMS TO OPERATE EFFECTIVELY, ROBUST DEVICE AND SYSTEM DESIGNS ARE NEEDED. UNFORTUNATELY IN THE CASE OF GALLIUM ARSENIDE DEVICES, DESIGN ENGINEERS USE WORKSTATION TOOLS THAT DESCRIBE THE COMPLEX CONDUCTION PATHS WITHIN DEVICES BY HIGHLY APPROXIMATE ALGORITHMS THAT ARE LIMITED IN THEIR PREDICTIVE ABILITIES. THE PRINCIPAL PHASE I RESEARCH OBJECTIVES ARE TO: (1) UTILIZE THE SRA PHYSICALLY-BASED DRIFT AND DIFFUSION EQUATION ALGORITHM TO DEVELOP PARAMETERSALLOWING AN EQUIVALENT CIRCUIT REPRESENTATION OF GALLIUM ARSENIDE FIELD EFFECT TRANSISTORS TO BE USED IN NONLINEAR DEVICE CIRCUIT ANALYSIS FOR LARGE SIGNALS AT HIGH FREQUENCY;(2) USE THE NONLINEAR CIRCUIT DIFFERENTIAL EQUATIONS IN THE DESIGN OF A POWER FET, AND VERIFY THE DESIGN USING THE DRIFTAND DIFFUSION EQUATIONS; AND (3) COUPLE THE SRA GENERATED NONLINEAR CIRCUIT DIFFERENTIAL EQUATIONS TO A GENERAL CIRCUIT ALGORITHM, IN THIS CASE THE HARMONIC BALANCE METHOD.THE INNOVATIVE FEATURE OF SRA'S PHASE I APPROACH IS TO OBTAIN THE COEFFICIENTS FOR THE NONLINEAR CIRCUIT REPRESENTATION OF A COMPOUND SEMICONDUCTOR FROM THE SOLUTIONS TO THE NONLINEAR GOVERNING PARTIAL DIFFERENTIAL EQUATIONS. SUCCESS IN THIS PROGRAM WOULD CREATE A DEVICE/CIRCUIT DESIGN TOOL USABLE BY A BROAD RANGE OF DESIGN ENGINEERS THAT IS APPLICABLE TO GAAS AND OTHER MODERN SEMICONDUCTOR MATERIALS. UNDER THE PHASE I PROGRAM THE DESIGN TOOL SHALL BE IMPLEMENTED FOR THE PROBLEM OF DESIGNING HIGH POWER GALLIUM ARSENIDE FETS.

* Information listed above is at the time of submission. *

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