InGaN-Channel Heterostructure Field Effect Transistor With Double Recessed Gate for Improved RF Performance

Award Information
Agency: Department of Defense
Branch: Army
Contract: W911QX-05-C-0042
Agency Tracking Number: A043-048-2682
Amount: $119,959.00
Phase: Phase I
Program: SBIR
Awards Year: 2005
Solicitation Year: 2004
Solicitation Topic Code: A04-048
Solicitation Number: 2004.3
Small Business Information
1195 Atlas Road, Columbia, SC, 29209
DUNS: 135907686
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Thomas Katona
 R&D Program Manager
 (803) 647-9757
Business Contact
 Remis Gaska
Title: President & CEO
Phone: (803) 647-9757
Research Institution
We propose a new approach for fabrication of reliable, high breakdown voltage InGaN-channel transistors for next generation radars and communications systems. Double recessed gate design enabled to increase breakdown voltage, alleviate non-ideal effects, and suppressing current instabilities and dispersion effects in GaAs-based HEMTs. However, no robust high performance double recessed gate GaN-based HFET technology has been developed. We propose to develop new epitaxial layer design with ternary (InGaN) and quaternary (AlInGaN) stop etch layers for double recess device fabrication. We already demonstrated significant improvement in the RF performance of AlGaN/InGaN/AlGaN/GaN-based HFETs with recessed gate design. We used our novel Migration Enhanced MOCVD (MEMOCVDTM) deposition technique to incorporate a very thin (2 nm) InGaN layer into AlGaN barrier. We propose to combine this approach with our novel AlGaN/AlInGaN/InGaN/GaN based Triple HFET (THFET) design. Quaternary AlInGaN cap layer grown over InGaN channel will be used as a second (lower) stop etch layer for RIE etch. We will recess both source and drain ohmic contacts and will fabricate them on In-containing AlInGaN cap layer for reduced contact resistance. The benefits of the proposed design are higher breakdown voltage without introduction of field plate design (which degrades high-frequency performance) and suppression of current dispersion.

* information listed above is at the time of submission.

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