Rad Effects in Semiconductor Electronics

Award Information
Agency:
Department of Defense
Branch
Defense Threat Reduction Agency
Amount:
$99,994.00
Award Year:
2005
Program:
SBIR
Phase:
Phase I
Contract:
HDTRA1-05-P-0107
Award Id:
74391
Agency Tracking Number:
T051-001-0073
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
3620 Lost Creek Boulevard, Austin, TX, 78735
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
147671957
Principal Investigator:
Wesley Morris
President
(512) 891-9702
wmorris@siliconspacetech.com
Business Contact:
Jon Gwin
Director
(210) 822-9706
jgwin@siliconspacetech.com
Research Institution:
n/a
Abstract
Silicon Space Technology and team member ATK Mission Research, along with Jazz Semiconductor, propose to demonstrate a comprehensive methodology for TCAD simulation using leading-edge Synopsys tools. These tools are capable of 3-D process and device simulation, enabling Mixed-Mode simulations studies of radiation particles with silicon devices and their response to the circuit. We will collaborate with Jazz Semiconductor to calibrate their CA18 CMOS process in 2-D and 3-D simulations. We will predict and describe accurately the transistor device performance to variations in channel size and/or to the process. Calibrated Mixed-Mode simulations will be more accurate in describing the results of single event effects. Given the availability of silicon foundry bulk CMOS technology, it would be advantageous if a comprehensive modeling approach based on the actual foundry process were available to predict or quantify its radiation sensitivity. We propose to demonstrate this is possible using commercially available process and device simulation tools that can be combined with SPICE simulation tools to perform Mixed-Mode simulations. The Mixed-Mode simulation methodology can then be embedded within the fabric of a commercially available TCAD modeling environment tool and used to quantify and predict the radiation sensitivity of the foundry process.

* information listed above is at the time of submission.

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