SBIR Phase I: Single Step Chemical Mechanical Planarization of Copper/Ultra low k Interconnects

Award Information
Agency: National Science Foundation
Branch: N/A
Contract: 0512581
Agency Tracking Number: 0512581
Amount: $99,998.00
Phase: Phase I
Program: SBIR
Awards Year: 2005
Solicitation Year: 2004
Solicitation Topic Code: MI
Solicitation Number: NSF 04-604
Small Business Information
8615 SW 19th Road, Gainesville, FL, 32607
DUNS: N/A
HUBZone Owned: N
Woman Owned: Y
Socially and Economically Disadvantaged: N
Principal Investigator
 Deepika Singh
 Ms
 (352) 334-7237
 singh@sinmat.com
Business Contact
 Deepika Singh
Title: Ms
Phone: (352) 334-7237
Email: singh@sinmat.com
Research Institution
N/A
Abstract
This Small Business Innovation Research (SBIR) research project aims to develop a single step chemical mechanical polishing (CMP) process for fabrication of next generation of copper based interconnects that join millions of transistors on a chip. The current state of the art copper CMP process is complicated requiring multiple steps to meet the defect quality and planarity requirements. Furthermore, existing processes create high stresses during polishing, which may not be compatible with the fragile low dielectric constant materials now being introduced by the semiconductor industry. To address these challenges the company proposes to develop the "soft polishing layer" concept for gentle removal of copper that does not damage the fragile dielectric layer. The use compatible chemistries and nanoparticles in the slurry allows successful development of a flexible, defect-free, single step process to fabricate copper based interconnects that will result in substantial cost savings to the semiconductor chip manufacturers. With the impending introduction of new fragile ultra low k materials, CMP processes are expected to become more complicated and expensive, to achieve the necessary levels of performance. If successful the implementation of the single step CMP process is expected to meet or exceed the technical performance levels of the 45 nm manufacturing node while decreasing the CMP manufacturing costs by up to 80% which could translates in billions of dollars saved in the semiconductor industry. The reduction in costs is largely due to the simplification of the manufacturing process, higher throughput, increased yield, less use of capital equipment and manpower, and reduction in consumable costs. The successful completion of this project will help maintain and grow the country's leadership in nanotechnology, a key area for future health and vitality of the nation.

* Information listed above is at the time of submission. *

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