CMOS Compatible Active Silicon Nanophotonic Devices and Systems

Award Information
Agency:
Department of Defense
Branch
Air Force
Amount:
$100,000.00
Award Year:
2004
Program:
STTR
Phase:
Phase I
Contract:
FA9550-04-C-0097
Agency Tracking Number:
F045-013-0141
Solicitation Year:
2004
Solicitation Topic Code:
AF04-T013
Solicitation Number:
n/a
Small Business Information
STRUCTURED MATERIALS INDUSTRIES
Suite 102/103, 201 Circle Drive North, Piscataway, NJ, 08854
Hubzone Owned:
N
Socially and Economically Disadvantaged:
N
Woman Owned:
N
Duns:
787144807
Principal Investigator:
Brent Hoerman
Scientist
(732) 302-9274
bhoerman@structuredmaterials.com
Business Contact:
Gary Tompa
President
(732) 302-9274
gstompa@structuredmaterials.com
Research Institution:
Cornell University
Daniel B Whitaker
Office of Sponsored Programs, 102 Day Hall
Ithaca, NY, 14853
(607) 255-5014
Nonprofit college or university
Abstract
In this STTR effort, Structured Materials Industries, Inc. (SMI), in collaboration with our academic and industrial partners will design, develop, and demonstrate a more efficient and compact, silicon-based electro-optic modulator based on nanoscale photonic structures that is completely compatible with standard CMOS processing. The structures developed will form the building blocks for a family of devices based on active silicon nanophotonics which will open the door to a new technology free from conventional microelectronics limitations, providing low power, high bandwidth, high speed and ultra-small optoelectronic components. Moreover, the active silicon nanophotonic devices to be developed will benefit from the inherent infrastructure and cost benefits of the existing CMOS manufacturing infrastructure. In Phase I of this project, we propose to expand preliminary results on specific electro-optic devices to address a more general class of devices and their integration on a silicon chip within a commercially manufacturable infrastructure. To this end, we will design, develop, and demonstrate devices for analysis and feasibility studies. In Phase II we will complete development of the devices and finalize a route for integrating passive and active components into complex, electro-optical systems on a single silicon chip within a commercial CMOS foundry.

* information listed above is at the time of submission.

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