Prompt-Dose Hardened Non-Volatile Re-Programmable FPGA

Award Information
Agency: Department of Defense
Branch: Missile Defense Agency
Contract: N00164-04-C-6037
Agency Tracking Number: B041-036-1745
Amount: $99,993.00
Phase: Phase I
Program: SBIR
Awards Year: 2004
Solicitation Year: 2004
Solicitation Topic Code: MDA04-036
Solicitation Number: 2004.1
Small Business Information
Suite 103, 201 Circle Drive, Piscataway, NJ, 08854
DUNS: 787144807
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Joe Cuchiaro
 Vice President
 (719) 260-9589
Business Contact
 Joe Cuchiaro
Title: Vice President
Phone: (719) 260-9589
Research Institution
There is currently significant effort in designing and developing microelectronic test structures, sub-circuits, models, and design techniques leading to a space radiation hardened re-programmable non-volatile Field Programmable Gate Array (FPGA). In this MDA Phase I effort, Structured Materials Industries, Inc. (SMI) will build upon existing work to evaluate a re-programmable FPGA FLASH based switch for intrinsic hardness to prompt dose radiation, identify improvements by utilizing Hardened By Design (HBD) techniques, and investigate novel hardening techniques (such as minimizing the electric field by using a poly-silicon field plate) in order to design the basic prompt-dose hardened FPGA cell for Phase II demonstration. Our Phase II effort will build upon Phase I results by developing and building test chip structures of the FLASH switch cells with a target radiation tolerance of 1Mrad(Si) or greater and prompt dose tolerance greater than 1.0E10 Rad(Si)/sec. These test circuits, as well as the resulting FPGA, will be targeted at the same advanced wafer process (130 nm and potentially 90 nm) and in the same merchant foundry (currently UMC) as current commercial high volume FPGAs. In Phase III SMI, with its partners, will market high-density re-programmable prompt-dose hardened FPGA devices utilizing low-cost foundry manufacturing to incorporate various known and novel (HBD) techniques for a strategically hardened version of commercial re-programmable non-volatile FPGA.

* Information listed above is at the time of submission. *

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