Large Area Si Substrates for InP Based Electronics and Optical Device Manufacturing

Award Information
Agency: Department of Defense
Branch: Missile Defense Agency
Contract: W9113M-04-C-0093
Agency Tracking Number: 02-0053T
Amount: $499,955.00
Phase: Phase II
Program: STTR
Awards Year: 2004
Solicitation Year: 2002
Solicitation Topic Code: BMDO02T-00
Solicitation Number: N/A
Small Business Information
7620 Executive Drive, Eden Prairie, MN, 55344
DUNS: 876868647
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: Y
Principal Investigator
 Peter Chow
 General Manager
 (952) 934-2100
Business Contact
 Jane Marks
Title: Business Manager
Phone: (952) 934-2100
Research Institution
 Northwestern University
 Susan Ross
 Office of Research & Sponsored, Projects, 633 Clar
Evanston, IL, 60208
 (847) 491-3003
 Nonprofit college or university
InP-based devices have applications encompassing the entire communication technology including wireless and fiber-optic telecommunications. It is especially suitable for very high frequency (up to 200GHz) operation. Therefore they are increasingly a critical component in all military missions. Their manufacturing costs are high in large part due the high cost of InP substrates, and their much smaller size compared to that of Si. Device throughput per wafer is proportional to the square of wafer diameter, so to gain economy of scale larger wafer size is much more favorable. Furthermore, system performance may benefit from integration of the compound semiconductor devices directly on silicon. We propose a Phase II investigation of high quality InP growth on silicon wafers which, when scaled up, could lead to 300 mm wafers for device fabrication. The robustness of the Si substrate will also lower processing costs. Such Si-based wafer platform could make the manufacturing significantly less expensive, and provide advanced architecture for integration of opto- and micro-electronics to silicon-circuits.

* Information listed above is at the time of submission. *

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