ARRAY COMMUNICATIONS COPROCESSOR

Award Information
Agency:
Department of Defense
Branch
Missile Defense Agency
Amount:
$490,100.00
Award Year:
1990
Program:
SBIR
Phase:
Phase II
Contract:
n/a
Agency Tracking Number:
10270
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
Systems & Processes Engineerin
1406 Smith Rd - Ste A, Austin, TX, 78721
Hubzone Owned:
N
Socially and Economically Disadvantaged:
N
Woman Owned:
N
Duns:
n/a
Principal Investigator:
Gary Mcmillian
(512) 385-0082
Business Contact:
() -
Research Institution:
n/a
Abstract
AN ARRAY COMMUNICATIONS COPROCESSOR (ACC) ARCHITECTURE HAS BEEN DEVELOPED THAT PROVIDES AUTOMATIC, ADAPTIVE, AND DYNAMICALLY CONFIGURABLE INTER-PROCESSOR COMMUNICATIONS AND IS COMPATIBLE WITH MOST COMMERCIALLY AVAILABLE STATE-OF-THE-ART COMPLEX INSTRUCTION SET COMPUTERS (CISC) AND REDUCED INSTRUCTION SET COMPUTERS (RISC). IN THIS INVESTIGATION, THE ARRAY COMMUNICATIONS CONTROLLER IS BEING IMPLEMENTED AS A COPROCESSOR SIMILAR TO A FLOATING POINT COPROCESSOR IMPLEMENTATION SO THAT INTER-PROCESSOR SYNCHRONIZED DATA TRANSFER COULD BE ACCOMPLISHED WITH A SINGLE IN-LINE INSTRUCTION. THIS METHODOLOGY WOULD GREATLY SIMPLIFY THE COMPLEXITY OF MULTI-PROCESSOR COMPUTER HARDWAREAND SOFTWARE. WHEN SUCCESSFUL, THIS INTER-PROCESSOR COMMUNICATIONS ARCHITECTURE WOULD PROVIDE AN AVENUE FOR DEVELOPMENT OF MULTI-PROCESSOR COMPUTERS FOR ADDRESSING LARGE SCALE STRATEGIC DEFENSE COMPUTING PROBLEMS, AND SIMPLER SOFTWARE FOR MULTI-PROCESSOR, REAL-TIME CONTROLLERS.

* information listed above is at the time of submission.

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