DIGITAL GAIN CONTROLLED INSTRUMENTATION AMPLIFIER - A GENERIC MIXED MODE IC FOR DATA CONDITIONING

Award Information
Agency:
Department of Defense
Branch
Army
Amount:
$500,000.00
Award Year:
1994
Program:
SBIR
Phase:
Phase II
Contract:
n/a
Award Id:
15144
Agency Tracking Number:
15144
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
1406 Smith Road, Austin, TX, 78721
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
n/a
Principal Investigator:
George Q Phan
Principal Investigator
(512) 385-0211
Business Contact:
() -
Research Institute:
n/a
Abstract
SYSTEMS & PROCESSES ENGINEERING CORPORATION (SPEC) HAS DEVELOPED A DIGSYSTEMS & PROCESSES ENGINEERING CORPORATION (SPEC) HAS DEVELOPED A DIGITAL GAIN CONTROLLED INSTRUMENTATION AMPLIFIER ASIC SYSTEM DESIGN FOR ITAL GAIN CONTROLLED INSTRUMENTATION AMPLIFIER ASIC SYSTEM DESIGN FOR INTERFACING A TRANSDUCER TO AN ANALOG-TO-DIGITAL CONVERTER. THIS ASICINTERFACING A TRANSDUCER TO AN ANALOG-TO-DIGITAL CONVERTER. THIS ASIC BUILDING BLOCK WILL FULFILL THE ARMY'S REQUIREMENTS FOR GENERIC MIXED BUILDING BLOCK WILL FULFILL THE ARMY'S REQUIREMENTS FOR GENERIC MIXED MODE INTEGRATED CIRCUITS FOR DATA CONDITIONING THE PROPOSED GENERIC M MODE INTEGRATED CIRCUITS FOR DATA CONDITIONING THE PROPOSED GENERIC MIXED MODE ASIC CONSISTS OF A PROGRAMMABLE GAIN CONTROLLED AUTO-ZERO INIXED MODE ASIC CONSISTS OF A PROGRAMMABLE GAIN CONTROLLED AUTO-ZERO INSTRUMENTATION AMPLIFIER, AN ANTI-ALIASING FILTER, A LOW OUTPUT IMPEDANSTRUMENTATION AMPLIFIER, AN ANTI-ALIASING FILTER, A LOW OUTPUT IMPEDANCE BUFFER, AND POWER DOWN CIRCUIT. IN THE PHASE I PROGRAM, SPEC PROPOSCE BUFFER, AND POWER DOWN CIRCUIT. IN THE PHASE I PROGRAM, SPEC PROPOSES TO DESIGN, LAYOUT AND SIMULATE AN ASIC DIGITAL GAIN CONTROLLED INSTES TO DESIGN, LAYOUT AND SIMULATE AN ASIC DIGITAL GAIN CONTROLLED INSTRUMENTATION AMPLIFIER TARGETABLE TO CMOS TECHNOLOGIES. THE PERFORMANCRUMENTATION AMPLIFIER TARGETABLE TO CMOS TECHNOLOGIES. THE PERFORMANCE OF CMOS ANALOG CIRCUITS IS COMPARABLE TO THEIR CONVENTIONAL BIPOLAR E OF CMOS ANALOG CIRCUITS IS COMPARABLE TO THEIR CONVENTIONAL BIPOLAR COUNTERPARTS, WHILE MAINTAINING THE ADVANTAGE OF LOWER POWER DISSIPATICOUNTERPARTS, WHILE MAINTAINING THE ADVANTAGE OF LOWER POWER DISSIPATION. SPEC'S ASIC DESIGN CENTER HAS AN EXPANSIVE CAE ENVIRONMENT FOR TAON. SPEC'S ASIC DESIGN CENTER HAS AN EXPANSIVE CAE ENVIRONMENT FOR TARGET MULTIPLE IC TECHNOLOGIES AND FOUNDRIES FOR FUTURE IMPLEMENTATIONSRGET MULTIPLE IC TECHNOLOGIES AND FOUNDRIES FOR FUTURE IMPLEMENTATIONS OF THE GENERIC MIXED MODE ASIC'S. OF THE GENERIC MIXED MODE ASIC'S.

* information listed above is at the time of submission.

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