Solid State Flight Data Recorder

Award Information
Agency: Department of Defense
Branch: Air Force
Contract: N/A
Agency Tracking Number: 25867
Amount: $750,000.00
Phase: Phase II
Program: SBIR
Awards Year: 1995
Solicitation Year: N/A
Solicitation Topic Code: N/A
Solicitation Number: N/A
Small Business Information
Systems & Processes
1406 Smith Road, Austin, TX, 78721
DUNS: N/A
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Anthony Faraci
 (512) 385-0211
Business Contact
Phone: () -
Research Institution
N/A
Abstract
System & Processes Engineering Corporation (SPEC) proposes to develop a high speed,high density solid state flight data recorder using state-of-the-art CMOS integrated circuit and Multi-Chip-Module (MCM) technologies. the solid state recorder will include 2 MEG x 8 synchronous dynamic random access memories (SDRAM), 2 MEG x 8 FLASH (EEPROM) memories and three custom CMOS integrated circuits to ease the user s interface requiarement. The solid state recorder will operate in a fast write mode up to the maximum address location followed by a store operation to the FLASH memories. A write and read clock are used to record and read date from the solid state recorder, all address generation is performed by the internal address counter. The three custom ICs will be implemented in VLSI s 0.6 micron CMOS process for operation at a minimum of 50 MHz. The CMOS ASIC chips provide all the critical timing and address generation to support the 150 gigabit storage at 15 gigabits per second. The modular design approach accommodates a wide range of density configurations from 16 MEG x 128 up to 600 MEG x 256 with a maximum storage time of 12 seconds.

* information listed above is at the time of submission.

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