Programmable Universal Multi-Input Encoder/Decoder

Award Information
Agency: Department of Defense
Branch: Air Force
Contract: N/A
Agency Tracking Number: 32137
Amount: $100,000.00
Phase: Phase I
Program: SBIR
Awards Year: 1996
Solicitation Year: N/A
Solicitation Topic Code: N/A
Solicitation Number: N/A
Small Business Information
Systems & Processes
401 Camp Craft Road, Austin, TX, 78746
DUNS: N/A
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Andrew A. Lee
 (512) 306-1100
Business Contact
Phone: () -
Research Institution
N/A
Abstract
Systems & Processes Engineering Corporation (SPEC) proposes to develop a Multi-Input Encoded/Decoder Application Specific Integrated Circuit (ASIC) chipset to be a programmable, universal interface between test equipment and digital recorders. The ASIC chepset will be fabricated using advanced GaAs MESFET technology. The Multi-Input Encoder/Decoder will be designed to interface both existing hardware and the next-generation of high-speed digital systems. It will be capable of handling data streams from as low as a few bits per second to as much as 15 gigabits per second. This architecture will have 64 input/output ports which will be used for both data transfer and port control. The inputs can be from any multiple combinations or serial or parallel data streams regardless of whether the data is sent synchrounously, asynchronously, or isochronously. The chipset is comprised of three programmable units: two Signal Interface ASICs and one Encoder/Decoder ASIC. The unit will be programmed "on-the-fly" by a PC in a high-level language such as C. Because of its programmability, the unit can act as a single solution to various custom-built data ports and any new interface standards for the next-generation test/sensor equipment and digital recorders.

* information listed above is at the time of submission.

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