Reconfigurable Integrated Fault Tolerance for Spaceborne Systems

Award Information
Agency:
Department of Defense
Branch
Air Force
Amount:
$748,271.00
Award Year:
2002
Program:
SBIR
Phase:
Phase II
Contract:
F33615-02-C-1121
Agency Tracking Number:
011IF-0505
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
Systran Federal Corp.
4027 Colonel Glenn Highway, Suite 210, Dayton, OH, 45431
Hubzone Owned:
N
Socially and Economically Disadvantaged:
N
Woman Owned:
N
Duns:
023956415
Principal Investigator:
Paul Rudolph
Principal Investigator
(937) 429-9008
prudolph@systranfederal.com
Business Contact:
Kenneth Baker
President/COO
(937) 429-9008
kbaker@systranfederal.com
Research Institution:
n/a
Abstract
Reconfigurable Computing (RC) is a technology in which the behavior of a processing system is changed by altering the hardware, rather than the software. This is achieved though the use of field programmable gate arrays (FPGAs). RC is useful when a highdegree of both performance and flexibility is needed, and especially when size, weight, or power constraints preclude use of dedicated components for separate functions. The recent development of high-density, rad-hard COTS FPGAs means that RC now has thepotential to be used in spaceborne applications. SFC is currently developing an RC tool suite, called DERC (Development Environment for Reconfigurable Computing), which includes both hardware and software to support development of RC applications.RIFTSS will extend the capabilities of the DERC tools to include extensive support for fault tolerance. The DERC API and logic libraries will be extended to include fault tolerant functions, including configuration scrubbing, redundancy, voting, etc. TheDERC Debug Tool will be modified to allow deliberate fault insertion into a design under test. The RIFTSS tools will be tested by using them to implement a real-world, fault tolerant application.

* information listed above is at the time of submission.

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