Digital Array Analog to Digital Converter

Award Information
Agency:
Department of Defense
Branch
Air Force
Amount:
$749,992.00
Award Year:
2005
Program:
SBIR
Phase:
Phase II
Contract:
FA8718-05-C-0012
Award Id:
67801
Agency Tracking Number:
F041-236-2447
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
4027 Colonel Glenn Highway, Suite 210, Dayton, OH, 45431
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
023956415
Principal Investigator:
Todd Grimes
Principal Investigator
(937) 429-9008
tgrimes@systranfederal.com
Business Contact:
Kenneth Baker
President & Chief Operati
(937) 429-9008
kbaker@systranfederal.com
Research Institution:
n/a
Abstract
Airborne communication platforms utilize multi-beam phased arrays to support multiple satellite links, resulting in higher data rates by digitally combining multiple sub-array modules. The use of digital array ADCs is required to facilitate signal-processing techniques to suppress interference and to allow multiple links. Commercial ADC devices are unable to meet the desired requirements. A state of the art ADC architecture must be developed to achieve the best performance/cost ratio. In Phase I, a basis for an EHF Receiver with an IF Band Pass ADC and a digital I/Q mixer was established. An innovative PTIBP ADC architecture based on Nyquist rate and undersampling techniques was conceptualized. A key component of this architecture is a unique PLP ADC that receives IF input signals in the range of 300 MHz to 1300 MHz and generates 12-bit outputs. The performance of the architecture has been confirmed with Matlab and a schematic design for a 12-bit PLP ADC has been completed using TSMC 0.18 um technology and successfully simulated using Cadence tools. In Phase II, a complete PTIBP ADC prototype with four PLP ADCs time interleaved on a single chip will be designed, fabricated, and tested to fulfill the needs of future airborne communication platforms.

* information listed above is at the time of submission.

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