Design Automation for Low-Power Digital Electronics
Department of Defense
Agency Tracking Number:
Solicitation Topic Code:
Small Business Information
Tanner Research, Inc.
180 North Vinedo Avenue, Pasadena, CA, 91107
Socially and Economically Disadvantaged:
Massimo Sivilotti, Phd
AbstractAsynchronous circuits offer the potential for significant power savings over traditional clocked logic. We propose to develop an electronic design, synthesis, and management tool targeted at low-power, asynchronous circuit design. We will DELIVER a functional prototype tool during Phase I. The Phase II tool will support VHDL as a hardware description language. The synthesis capabilities will include support for high-level language input, technology mapping, automated layout synthesis, and limited built-in test support using boundary-scan and full-scan techniques. The tool will be tightly integrated into our existing low-cost component-level integrated circuit design and synthesis tools. The tool will support industry standard CAD formats, and frameworks (e.g. CFI) where appropriate. A novel self-timed synthesis methodology will be used, permitting fully static circuits that have been shown to operate robustly with power supply voltages less than 1V. In conjunction with the inherent power advantages of asynchronous circuits, this power supply flexibility permits a wide tradeoff of operating speed vs. power consumption, in the field. During Phase I we will develop the asynchronous circuit synthesis software. We will also implement and deliver a prototype design tool, and fabricate a test IC designed with the tool. The Phase I design and prototype prepares for Phase II implementation of the complete system.
* information listed above is at the time of submission.