A low-power DSP MOM for Mine Warfare

Award Information
Agency: Department of Defense
Branch: Navy
Contract: N/A
Agency Tracking Number: 32708
Amount: $69,157.00
Phase: Phase I
Program: SBIR
Awards Year: 1996
Solicitation Year: N/A
Solicitation Topic Code: N/A
Solicitation Number: N/A
Small Business Information
180 North Vinedo Avenue, Pasadena, CA, 91107
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Michael Emerling, Ph.d.
 (818) 792-3000
Business Contact
Phone: () -
Research Institution
Multi-chip module (MCM) technologies address numerous shortcomings of printed circuit boards (PCB) based designs. The short trace lengths afforded by an MCM implementation markedly improve both analog signal and digital signal integrity in high bandwidth/clock-rate designs. Reductions in trace, lead, and package capacitances can noticeably decrease overall system power requirements. Finally, with MCM components, the size of the overall system falls drastically. The need for low-power, high computational bandwidth, compact date processing and control modules for autonomous naval weapons systems is high. The marriage of state-of-the- art digital signal processing (DSP) technology with MCM design provides an opportunity to meet these goals. In this Phase I effort, we propose to design and develop a signal processing module based on a premier 2 billion- operations-per-second (BOPS) DSP and using a multi-chip module substrate. We will investigate various MCM vendors and evaluate different technologies for optimal use in the DSP module. The proposed module will include program and data memory and multiple high-speed ADC and analog multiplexes, providing up to 256 channels of ultrasonic bandwidth signal acquisition. The Phase I design prepares for Phase II implementation of the complete system.

* Information listed above is at the time of submission. *

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