MBE Growth and Characterization of Radiation Hardened PHEMT Devices
Small Business Information
Tlc Precision Wafer
661 5th Ave. North, Suite 160, Minneapolis, MN, 55405
Thomas E. Nohava
AbstractAs the complexity of semiconductor integrated circuits increases and the power supply is scaled to lower voltages, the problems associated with radiation hardening reliability and testability are exacerbated. GaAs electronic devices exhibit a superb tolerance to total ionizing dose of radiation; however, they have poor tolerance to single event upsets (SEUs) caused by high energy ion strikes. SEUs lead to temporary malfunctions which do not destroy the device but lead to error signals because of the possible change of state of a transistor. Current approaches to mitigate the effects of SEUs involve redundancy at the circuit level and system level. These hardware approaches result in reduced level of integration, increased design complexity and higher power consumption. Other approaches use software-level error detection and correction. These approaches suffer from reduced speed. In addition to the issues described above, radiation hardness testing approaches currently used to qualify integrated circuits are very expensive, time consuming and have long lead times. TLC plans to develop (a) new materials technologies that improve the hardness of GaAs electronic devices to SEUs and total ionizing radiation and (b) develop new methodologies for screening materials and electronic devices for radiation hardness before expensive radiation hardness characterization.
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