Rad Hard, Back-illuminated, SOI CMOS Star Tracker

Award Information
Agency:
Department of Defense
Branch
Missile Defense Agency
Amount:
$749,999.00
Award Year:
2004
Program:
SBIR
Phase:
Phase II
Contract:
W9113M-04-C-0070
Award Id:
64236
Agency Tracking Number:
031-1033
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
12725 SW Millikan Way Suite 300, Beaverton, OR, 97005
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
124348652
Principal Investigator:
George Williams
President
(503) 906-7906
georgew@voxtel-inc.com
Business Contact:
George Williams
President
(503) 906-7906
georgew@voxtel-inc.com
Research Institution:
n/a
Abstract
In this Phase II SBIR program, Voxtel, Inc. will execute a design of experiments (DOE) to optimize the architecture and processes required to robustly manufacture, with high yields, a high performance radiation-hard, silicon-on-insulator complimentary metal-oxide-semiconductor (SOI CMOS) imager that meets the requirements of the Radiation-Hardened Star Tracker for future space-based defense systems. During Phase II, we will identify and empirically characterize the important design and process factors affecting performance and process yields, and we will incorporate this knowledge in our modeling tools and develop a visible SOI CMOS imager. We will then fabricate the imager, characterize its imaging performance, and demonstrate the radiation tolerance of the device. We have optimized the design of the Radiation-Hardened SOI CMOS Star Tracker for reliable operation in extreme radiation and temperature environments, both in space and on Earth. Features of this bulk/SOI CMOS active pixel imager include large format, fast framing capability, random readout, non-destructive readout, windowing capability, and compatibility with on-chip analog-to-digital conversion (ADC). High centroiding accuracy is achieved - even in debris gamma - through gamma event mitigation techniques which include sub-frame and sub-pixel event removal, and the reduced radiation cross section of the design. Total dose radiation hardening is achieved through reduced silicon volume, novel device design structures, as well as through the use of radiation-hardened SOI CMOS processes.

* information listed above is at the time of submission.

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