Next Generation Programmable Gate Array

Award Information
Agency: Department of Defense
Branch: Air Force
Contract: FA9453-06-M-0147
Agency Tracking Number: F061-256-1011
Amount: $99,991.00
Phase: Phase I
Program: SBIR
Awards Year: 2006
Solicitation Year: 2006
Solicitation Topic Code: AF06-256
Solicitation Number: 2006.1
Small Business Information
THESEUS LOGIC, INC.
12000 Research Parkway, Suite 436, Orlando, FL, 32826
DUNS: 940980113
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Robert Read
 Engineer
 (407) 282-9990
 rread@theseus.com
Business Contact
 Ryan Jorgenson
Title: VP Engineering
Phone: (407) 282-9990
Email: ryan@theseus.com
Research Institution
N/A
Abstract
Existing Field Programmable Gate Arrays (FPGAs) provide space-based users with an awkward choice between high performance commercial devices that are not capable of functioning reliably in a space-borne environment, or low performance devices that are specially hardened for space environments. This unacceptable compromise forces space-based applications needing high performance to incur higher NRE costs to develop hardened, mission-specific cell-based ASICs that typically do not provide the flexibility needed for future enhancements. What is needed is a high performance, flexible, field-programmable platform that is capable of operating reliably in harsh environments. This program focuses on the (continued) development of a general-purpose, field-programmable signal processing platform. The goal(s) of the platform ASIC include: 1. Computational efficiencies for signal processing algorithms measured in BOPS/Joules within a factor of two of a standard-cell based ASIC performing an equivalent set of operations. 2. Programmable in a hardware description language at a coarse level. 3. Capable of changing algorithm sets in one clock cycle. 4. Capable of being implemented in multiple processes, including rad-hard SOI 5. Capable of going from code verification to deployment in two weeks or less.

* information listed above is at the time of submission.

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