Wafer-Scale Geiger-mode Silicon Photomultiplier Arrays Fabricated Using Domestic CMOS Fab
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AbstractThere is a need for developing a high-performance single photon avalanche photodiode (SPAD) detector array design, which can be fabricated using a domestic, high-volume commercial CMOS process on 200mm or greater wafers. Many of todays silicon photomultiplier (SiPM) devices are fabricated using dedicated fabs with custom processes. Current SiPM designs also have variable breakdown voltage, high dark count rates, high after-pulsing, high cross talk, and limited detector quantum efficiency. Unfortunately, large scale commercial CMOS processes are antithetical to fabricating high-performance imaging devices, especially Geiger-mode avalanche photodiodes (GmAPDs), which require substrates and doping profiles compatible with the high electric fields necessary to sustain carrier avalanche. Low cost methods are needed to fabricate wafer-scale silicon photomultipliers using high volume CMOS fabs. Silicon GmAPD arrays will be designed for fabrication on a commercial CMOS fab. Building upon previous experience, devices will be modeled in 3D CAD tools, and a series of designed experiments will be performed to determine a design that can maintain high performance over large areas. Provisions for photocomposition will be included. The Si GmAPD arrays developed on the program will be made available to silicon photomultiplier developers. Commercial Applications and Other Benefits: The innovation will enable detectors for a wide range of applications including high-energy and nuclear physics, homeland security detection, medical imaging and scanning, time-of-flight measurement, SPECT, astronomy, and astrophysics
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