Integrated High-Complexity Systems in Silicon Photonics

Award Information
Department of Defense
Air Force
Award Year:
Phase I
Agency Tracking Number:
Solicitation Year:
Solicitation Topic Code:
Solicitation Number:
Small Business Information
Portage Bay Photonics
214 Summit Avenue E, #402, c/o Michael Hochberg, Seattle, WA, -
Hubzone Owned:
Minority Owned:
Woman Owned:
Principal Investigator:
MIchael Hochberg
Assistant Professor
(626) 429-4051
Business Contact:
Tom Baehr-Jones
(626) 487-7721
Research Institution:
University of Washington
Lynne Chronister
4333 Brooklyn Ave NE
Box 359472
Seattle, WA, 98195-9472
(206) 543-4043
Nonprofit college or university
ABSTRACT: We propose to develop and validate (in phase I) detailed designs for highly scaled silicon photonic-electronic chips for applications relevant to the DOD in high-bandwidth data communication. This effort will be closely coordinated with the OPSIS (Optoelectronic Systems Integration in Silicon) project being led at the University of Washington, an effort to create an open foundry process for silicon photonic-electronic integrated circuits and to develop a comprehensive design kit for electronic-photonic integrated circuits (EPICs) in silicon. While that effort is aimed at developing design rules and device libraries in a bottom-up approach, the effort proposed here is a top-down approach, driven by system-level needs for high-speed data links both on-chip and chip-to-chip. We will work to take the models created and extracted based on the OPSIS chips, and use them to model systems where highly-scaled EPIC circuits will provide key advantages for military systems. In particular, we will make use of the recently released software and simulation tools developed in the Bergman Laboratory at Columbia (PhoenixSim - ( & p=phoenixsim)) in order to develop a comprehensive system modeling framework for the OPSIS EPIC chips, and we will use this framework to model two different types of systems, each of which we expect to benefit significantly from highly scaled optoelectronic integration. The two test systems we intend to investigate in phase I are: (1) A high-bandwidth data communication system aimed at short-reach (<100m) applications, in the 500Gbit-2Tbit/second range , for ultra-high bandwidth data communication in supercomputing and on airborne platforms, aimed at small-fiber count and WDM for high bandwidth density. And (2) an on-chip link at similar bandwidth, aiming for ultimate low energy per bit metrics and direct integration with electronics. In phase II, we will build and test the chips designed in phase I. BENEFIT: We anticipate that as the silicon optical systems for chip-scale and chip-to-chip datacom applications discussed within this proposal become practical, the technology may be licensed directly to defense contractors such as Boeing or BAE Systems or commercialized directly by Portage Bay Photonics. The founders have extremely strong relationships with BAE Systems, Boeing, Intel, Agilent, Tektronix, and several other possible customers, and will work closely with them to define products based on the technology we are developing that will be compelling for the commercial market. The commercial applications for the kind of high-bandwidth, multi-terabit links we are proposing are legion. To cite just a few examples, connecting GPU"s, CPU"s, storage and memory to a very fast, low-latency optical bus architecture could have a huge impact on the performance of personal computers. Intel"s Light Peak technology is already bringing optics into the market for PC to peripheral connections, but our proposed work will provide a path toward creating similar links with 10 to 100x the bandwidth.

* information listed above is at the time of submission.

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