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Precise fabrication of photonic integrated systems using low cost nanoimprint process

Award Information
Agency: Department of Defense
Branch: Air Force
Contract: FA9550-11-C-0070
Agency Tracking Number: O10B-006-1040
Amount: $100,000.00
Phase: Phase I
Program: STTR
Solicitation Topic Code: OSD10-T006
Solicitation Number: 2010.B
Timeline
Solicitation Year: 2010
Award Year: 2011
Award Start Date (Proposal Award Date): 2011-07-27
Award End Date (Contract End Date): N/A
Small Business Information
4515 settles bridge rd, Suwanee, GA, 30024-
DUNS: 966766482
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Murtaza Askari
 Research Engineer
 (404) 966-4669
 murtazaaskari@gmail.com
Business Contact
 Paul Hart
Title: Contracting Officer
Phone: (404) 894-6929
Email: paul.hart@osp.gatech.edu
Research Institution
 Georgia Institute of Technology
 Gary S May
 777 Atlantic Dr
Atlanta, GA, 30332-
 (404) 894-2902
 Nonprofit college or university
Abstract
In this STTR proposal, we propose to develop a cost-effective and high-fidelity nanoimprint process for the fabrication of integrated photonics devices. VLSI photonics applications require a hig-level of control on device-to-device uniformity. Nanoimprint lithography (NIL) holds promise to overcome the current technological challenges in lithography while being cost effective at the same time. One of the key features of NIL is its ability to preserve and directly translate the lithography patterns from the mold, which should enable highly improved device-to-device uniformity within a die and between die-to-die on a wafer. In this proposal, we will demonstrate the feasibility of using NIL for photonics applications, especially for VLSI integrated photonics structures.We will develop a robust fabrication process that uses NIL to fabricate photonics structures. We will also demonstrate the feasibility of CMOS compatible and passive post fabrication tuning process based on NIL to tune the optical properties of the photonic structures. It will be shown in the course of this proposal that devices fabricated using NIL suffer from lower chip-to-chip variations than those fabricated using e-beam lithography while maintaining the same quality. This effort will also prove a first step for extending the application of NIL in opto-electronics and IC fabrication.

* Information listed above is at the time of submission. *

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