Anti-Tamper Technologies for Missile Defense

Award Information
Agency: Department of Defense
Branch: Missile Defense Agency
Contract: HQ0147-11-C-7501
Agency Tracking Number: B103-017-0274
Amount: $99,948.00
Phase: Phase I
Program: SBIR
Awards Year: 2011
Solicitation Year: 2010
Solicitation Topic Code: MDA10-017
Solicitation Number: 2010.3
Small Business Information
3533 Albatross Street, San Diego, CA, -
DUNS: 836003459
HUBZone Owned: N
Woman Owned: Y
Socially and Economically Disadvantaged: N
Principal Investigator
 Carl Murphy
 Vice President
 (619) 692-9476
Business Contact
 Christine Murphy
Title: President
Phone: (619) 692-9476
Research Institution
FPGA devices provide a secure environment for execution of critical technology only if the configuration bitmap is kept from attackers. Side Channel Attacks (SCAs) may extract keys during AES-protected bitmap loading -- a serious problem for many anti-tamper system solutions. Accord proposes an SCA immune soft-processor as the crucial missing piece for providing tamper resistance during FPGA bitmap loading. Accord's CRIPTC processor inherently has a very high level of resistance to SCAs. In the proposed effort, Accord will analyze and benchmark test the CRIPTC Architecture"s SCA resistance. Using these results Accord will design specialized modifications to the architecture to increase its baseline resistance. In Phase I, Accord will implement selected changes and show initial benefits compared to the basic design. Comparison is also made with the FPGA manufacturer"s standard soft-core processor. A target scenario, protection for loading an FPGA with CPI content, will be the example case study. The Phase II design will produce a revised soft-core (SCAR-CRIPTC) to execute AES without detectable physical leaks, which Accord will demonstrate, benchmark and evaluate the SCA protection level.

* Information listed above is at the time of submission. *

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