Real-Time RF Channel Impairment Emulator

Award Information
Agency: Department of Defense
Branch: Navy
Contract: N66001-11-P-5119
Agency Tracking Number: N111-085-1051
Amount: $79,996.00
Phase: Phase I
Program: SBIR
Awards Year: 2011
Solicitation Year: 2011
Solicitation Topic Code: N111-085
Solicitation Number: 2011.1
Small Business Information
DataSoft Corp.
1475 N. Scottsdale Road, #460, Scottsdale, AZ, -
DUNS: 960462034
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: Y
Principal Investigator
 Larry Dunst
 Principal Investigator
 (480) 763-5777
 larry.dunst@datasoft.com
Business Contact
 Vik Patel
Title: CEO
Phone: (480) 763-5777
Email: vik.patel@datasoft.com
Research Institution
 Stub
Abstract
The DataSoft Advanced Real-time RF Channel Impairment Emulator (DARRCIE) provides the required channel emulation capabilities in support of evaluating next-generation wireless technologies by a detailed study, evaluation, and comparison of the enabling technologies and concepts offered by the Optical/Analog, Band-Detecting Digital, and Direct Full-Band Digital architectural candidate approaches. Using defined architectural evaluation criteria each of three candidate approaches are assessed regarding there wideband RF interface, propagation delay, range attenuation & slow fading, fast fading & Doppler, topology configurability, noise & interference, and scalability capability. For the selected most viable candidate approach, each capability is further examined with a focus on risk reduction to select a minimal set of channel emulator capabilities for prototyping and associated proof-of-concept testing. Using defined scenarios for proof-of-concept testing with associated validation criteria, the performance of the minimal prototype is analyzed to resolve issues that could hinder a successful Phase II eight channel emulator prototype development. Finally, a combined system and high-level design specification is written to capture the system functional and performance requirements, external interfaces, top-level system design, and subsystem interfaces.

* information listed above is at the time of submission.

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