Low Power, Radiation Hardened Embedded Memory Compiler

Award Information
Agency: Department of Defense
Branch: Air Force
Contract: FA9453-11-C-0179
Agency Tracking Number: F093-084-1908
Amount: $749,961.00
Phase: Phase II
Program: SBIR
Awards Year: 2011
Solicitation Year: 2009
Solicitation Topic Code: AF093-084
Solicitation Number: 2009.3
Small Business Information
4775 Centennial Avenue Suite 130, Colorado Springs, CO, -
DUNS: 619085371
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Dean Allum
 Design Engineer
 (719) 531-0805
Business Contact
 Karen VanCura
Title: Chief Financial Officer
Phone: (719) 531-0805
Email: karen.vancura@micro-rdc.com
Research Institution
ABSTRACT: Micro-RDC will develop a low power, radiation hardened memory compilers suitable for use in current and future satellite missions. The memory compilers can quickly generate embedded memory blocks hardened against Total Ionizing Dose effects, Single Event Upsets, Single Event Latch-up, and Single Event Transients. The memory compiler supports a variety of different attributes including word length, aspect ratio, and memory types for several foundry processes and feature sizes to meet various application and radiation requirements. The BAE 150nm technology and the IBM 90nm Bulk plus IBM 45nm SOI processes will each have an SRAM compiler to provide a MegaRAD level Radiation Hardened-By-Design solution. These embedded SRAM blocks either have been, or will be fabricated and verified to meet the radiation hardened levels of this solicitation. The IBM 45nm 12SOI process is also supported to provide an advanced deep sub-micron SOI commercial foundry solution. The Micro-RDC compiler will supply all of the Computer Aided Design (CAD) files required to integrate with standard ASIC design flows. BENEFIT: High performance ASICs are expected to provide most of the processing functions in advanced satellite systems. These devices require large amounts of on-chip memory to prevent memory bandwidth limitations from stalling the processors. In the commercial realm, memory compilers are used to quickly and automatically design embedded memory blocks with a variety of different attributes including word size, aspect ratio, memory type, access time, and power dissipation. ASICs for space applications are not supported by standard commercial memory compilers. This is due to the complications associated with developing compilers to incorporate the unique aspects of space electronics such as radiation hardness, low power, and reliability. The Low Power, Radiation Hardened Memory Compiler developed under this effort provides a cost effective means for system designers to develop Radiation Hardened ASICs for space systems. Micro-RDC will enhance and maintain the Radiation Hardened Embedded Memory Compiler as fabrication technologies advance funding these activities out of commercial sales. This will provide an up-to-date compiler independent of fabrication facility that keeps to date with cost-effective volume of scale manufacturing for Radiation Hardened Embedded Memory.

* Information listed above is at the time of submission. *

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