Digital RF Memory (DRFM) Jammer Simulator

The ability to rapidly prototype and analyze signal waveforms for emerging and constantly changing threat systems is needed in the intelligence and test and evaluation (T & E) communities. Performing this type of work is difficult and expensive during flight tests using range assets. A better approach is a controlled environment such as a laboratory equipped with hardware-in-the-loop test assets supporting in depth and such repeatable testing. Special test assets are required to provide proper stimulation to the systems under test. The focus of the research documented in this proposal is to further study and develop hardware prototype pieces and software concept elements for a DRFM Jammer Simulator that can be used to show Proof of Concept test results in a lab environment.