Integrated High-Complexity Systems in Silicon Photonics

Award Information
Agency: Department of Defense
Branch: Air Force
Contract: FA9550-12-C-0079
Agency Tracking Number: F10B-T34-0038
Amount: $829,033.00
Phase: Phase II
Program: STTR
Awards Year: 2012
Solicitation Year: 2010
Solicitation Topic Code: AF10-BT34
Solicitation Number: 2010.B
Small Business Information
Portage Bay Photonics
214 Summit Avenue E, #402, c/o Michael Hochberg, Seattle, WA, -
DUNS: 832655224
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Thomas Baehr-Jones
 (626) 487-7211
Business Contact
 Stephen Little
Title: COO
Phone: (206) 697-3448
Research Institution
 University of Delaware
 Mark A Barteau
 UD Research
209 Hullihen Hall
Newark, WA, 19716-
 (302) 831-4007
 Nonprofit college or university
ABSTRACT: In phase I of this program, we proposed to develop and validate detailed designs for highly scaled silicon photonic-electronic chips for applications relevant to the DOD in high-bandwidth data communication. This effort has been closely coordinated with the OPSIS (Optoelectronic Systems Integration in Silicon) project being led at the University of Washington, an effort to create an open foundry process for silicon photonic-electronic integrated circuits and to develop a comprehensive design kit for electronic-photonic integrated circuits (EPICs) in silicon. While that effort is aimed at developing design rules and device libraries in a bottom-up approach, the effort proposed here is a top-down approach, driven by system-level needs for high-speed data links both on-chip and chip-to-chip. We have worked together to take the models created and extracted based on the OPSIS chips, and use them to model systems where highly-scaled EPIC circuits will provide key advantages for military systems. In particular, we have made use of the recently released software and simulation tools developed in the Bergman Laboratory at Columbia (PhoenixSim - ( & p=phoenixsim)) in order to develop a comprehensive system modeling framework for the OPSIS EPIC chips, and we used this framework to model two different types of systems, each of which we expect to benefit significantly from highly scaled optoelectronic integration. The two test systems we investigated in phase I are: (1) A high-bandwidth data communication system aimed at short-reach (<100m) applications, in the 500Gbit-2Tbit/second range , for ultra-high bandwidth data communication in supercomputing and on airborne platforms, aimed at small-fiber count and WDM for high bandwidth density. And (2) an on-chip optical router at similar bandwidth, aiming for ultimate low energy per bit metrics and direct integration with electronics. In phase II, we will build and test versions of the chips designed in phase I. This program is structured as a base effort around building (1), an option around building system (2), and a fundamental research component aimed at developing coherent communication capabilities, which will enhance both systems in the future. BENEFIT: The co-founders of Portage Bay Photonics, Hochberg and Baehr-Jones, were co-founders at Luxtera (along with Dr. Cary Gunn, Prof. Eli Yablonovitch, Prof. Axel Scherer, and Dr. Alex Dickinson), a company that has commercialized 10 gigabit/second electro-optic modulators fabricated in a silicon CMOS foundry flow, and both bring substantial experience both in commercialization and in research to Portage Bay Photonics. Luxtera has raised over $100,000,000 in venture capital to date, and was the recipient of government funding under the DARPA EPIC program, the DARPA UNIC program and the NIST ATP program. Luxtera is currently selling a 40Gbit/second optically active cable in volumes of hundreds of thousands of units, and is sampling a 100G/second version. Thierry Pinguet was one of the first employees at Luxtera, and worked in both technical and business roles there. Prior to founding Luxtera, Hochberg and Baehr-Jones founded a simulation software company called Simulant, based on their distributed FDTD code. The global market for silicon photonics in 2008 was $23.21 million. The expected growth rate (CAGR) is 105.3% from 2009 to 2014 due to new products and applications that are to be commercialized in the next five years. There is demand for silicon photonics technology in the market currently as some photonic devices have been implemented, but these have only very recently been introduced; silicon photonics is still an extremely immature field in terms of commercial application. (MarketsandMarkets, August 12, 2009). We anticipate that as the silicon optical systems for chip-scale and chip-to-chip datacom applications discussed within this proposal become practical, the technology may be licensed directly to defense contractors such as Boeing or BAE Systems or commercialized directly by Portage Bay Photonics. The founders have extremely strong relationships with BAE Systems, Boeing, Intel, Agilent, Tektronix, and several other possible customers, and we will work closely with these partners to define commercially compelling products based on the technology being developed under this program. Furthermore, Howard Bubb, a former corporate officer at Intel, who ran a>$1B/year business for Intel, has worked in the Nanophotonics Group as an entrepreneur-in-residence, and has worked with us to explore the first commercial applications of this technology. We believe that the marketing experience that our team brings to the table are adequate for a phase III transition. The commercial applications for the kind of high-bandwidth, multi-terabit links we are proposing are legion. To cite just a few examples, connecting GPU"s, CPU"s, storage and memory to a very fast, low latency optical bus architecture could have a huge impact on the performance of personal computers. Our first planned product will be the Tbit scale point to point link, according to current thinking. This is a device which, if we can fully leverage the advantages of silicon volume manufacturing, could become the basis of a multi-billion dollar product line (with modifications, of course), since it could potentially appear on nearly every motherboard as a link between RAM, GPU and CPU. In the nearer term, we have held detailed discussions with Cray about applications in high performance computing, with Tektronix (who donated about $500k worth of test equipment in support of our efforts) about use in high-bandwidth test systems, with Boeing and BAE Systems about airborne applications, and with Intel about applications in commodity computing. Bringing a packaged product to market will be a $10M+ endeavor. The PBP founders have extensive experience and contacts in the venture capital world to raise this money if needed, though they would prefer to find other sources of funding, perhaps through partnership with an early customer. Another path toward revenue could emerge through licensing these designs or associated IP to the other users of the OPSIS foundry service. This will be explored in Phase II as a possible strategy. Strong validation from the commercial sector for the economics of silicon photonics is emerging through the large corporate user base (tens of companies) making use of the OPSIS processes. The main pure-play competitor for this technology will likely be work being done in Indium Phosphide, by companies like Infinera. Because of the economics of silicon CMOS, if we can find a reasonably high volume application for this technology, there is no question that CMOS will be the favored solution; InP is intrinsically very expensive and low-yield, and it is difficult to manufacture complex systems in high volume in these custom materials systems.

* information listed above is at the time of submission.

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