Rad-Hard and ULP FPGA with "Full" Functionality

Award Information
Agency: National Aeronautics and Space Administration
Branch: N/A
Contract: NNX12CA84C
Agency Tracking Number: 105915
Amount: $749,999.00
Phase: Phase II
Program: SBIR
Awards Year: 2012
Solicitation Year: 2010
Solicitation Topic Code: X6.02
Solicitation Number: N/A
Small Business Information
240 W Elmwood Drive, STE 2010, Dayton, OH, 45459-4248
DUNS: 141943030
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Todd Grimes
 Principal Investigator
 (937) 433-2886
Business Contact
 V. Nagarajan
Title: Business Official
Phone: (937) 433-2886
Email: vnagarajan@Rnet-Tech.com
Research Institution
RNET has demonstrated the feasibility of developing an innovative radiation hardened (RH) and ultra low power (ULP) field programmable gate array (FPGA), called the RH/ULP FPGA. The design utilizes an advanced SOI process technology. It is the vision of RNET to develop a family of radiation hardened FPGA products with a variety of features including programmable logic, configurable analog functions, soft/hardcore microprocessor, dedicated DSP functions, I/O, dedicated memory blocks, memory controllers, global clock, and JTAG interface. In addition, specialized circuits for mitigation of TID/temperature effects, radiation hardened by design SEU techniques, and memory scrubbing are planned. Our vision at the conclusion of this proposed SBIR is to fabricate a "commercial" RH/ULP FPGA with the most important features listed. Ideally the FPGA to be developed under the proposed Phase 2 would contain all of these features, but due to the limitation of funds and allotted time, a scaled down version would be completed. The envisioned device will incorporate the basic programmable logic functions, dedicated block RAM, DSP functions, configurable I/O, global clock distribution network, and JTAG interface. Phase 2 will set the stage for more feature-rich product families to be developed as commercialization continues.

* Information listed above is at the time of submission. *

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