Reconfigurable/Reprogrammable Communications Systems

Award Information
Agency:
National Aeronautics and Space Administration
Branch
n/a
Amount:
$124,971.00
Award Year:
2012
Program:
SBIR
Phase:
Phase I
Contract:
NNX12CD71P
Award Id:
n/a
Agency Tracking Number:
115347
Solicitation Year:
2011
Solicitation Topic Code:
O1.02
Solicitation Number:
n/a
Small Business Information
CA, Culver City, CA, 90230-4650
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
831566877
Principal Investigator:
DenisZelenin
Principal Investigator
(310) 683-2628
denis@pacificmicrochip.com
Business Contact:
DaliusBaranauskas
Business Official
(310) 683-2628
dalius@pacificmicrochip.com
Research Institute:
Stub




Abstract
NASA's latest effort in developing a common platform for space communication and navigation systems is the Space Telecommunications Radio System (STRS) standard. It defines architecture enabling interoperability of Software Defined Radio (SDR) components. Future proof, power conscious architectures of STRS compliant re-configurable SDR transceivers are needed for implementation of envisioned space communication systems.Pacific Microchip Corp. proposes to develop a highly integrated, low-power, multifunctional 56GS/s Direct Digital Modulation/Demodulation (DDM) SDR transceiver using 45nm SOI CMOS technology. The resulting STRS compliant integrated solution will be radiation tolerant by technology and design. The direct conversion based transceiver utilizes novel 56GS/s D/A and A/D converters and features arbitrary waveform generation (AWG) mode. The availability of AWG and DDM modes removes limitations on the synthesized waveform shapes up to 28GHz. Pacific Microchip Corp. proposes all-digital implementation of frequency up- and down-conversion, I/Q modulation and demodulation. Since digital power is mostly dynamic, digital processing will enable power consumption scaling linearly with the operating frequency.Phase I work will provide a complete definition and in-silico validation of the proposed device. The Phase II program will produce a fieldable product. In order to facilitate the commercialization efforts in Phase III, a commercial radiation-tolerant CMOS SOI technology will be used.

* information listed above is at the time of submission.

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