High Performance ADC for Reconfigurable/Reprogrammable Communication Systems

Award Information
Agency: National Aeronautics and Space Administration
Branch: N/A
Contract: NNX12CD72P
Agency Tracking Number: 114446
Amount: $124,460.00
Phase: Phase I
Program: SBIR
Solicitation Topic Code: O1.02
Solicitation Number: N/A
Solicitation Year: 2011
Award Year: 2012
Award Start Date (Proposal Award Date): 2012-02-13
Award End Date (Contract End Date): 2012-08-13
Small Business Information
3580 West Ina Rd, Tucson, AZ, -
DUNS: 157955597
HUBZone Owned: N
Woman Owned: Y
Socially and Economically Disadvantaged: N
Principal Investigator
 Esko Mikkola
 Principal Investigator
 (520) 742-3300
Business Contact
 Milena Thompson
Title: Business Official
Phone: (520) 742-3300
Email: mthompson@ridgetopgroup.com
Research Institution
Ridgetop Group will develop a 3X improvement in sampling resolution over current state-of-the art analog-to-digital converter (ADC) technology to support reconfigurable/reprogrammable communication systems. The significance of this innovation lies in the time-interleaved pipeline ADC, based on the most advanced silicon-germanium (SiGe) BiCMOS technology available, with over 2 bits higher effective number of bits (ENOB = 11.0 bits) than the best commercially available radiation-tolerant 2 GS/s ADCs (ENOB = 8.9 bits). In addition, the ADC consumes 65% less power than commercial ADCs, conserving valuable spacecraft power.For maximum flexibility and minimal power consumption, the ADC provides two configurable pipeline channels and four programmable operation modes. The ADC will also provide 3 GHz input analog bandwidth for direct sampling of RF signals in the S-band.The ADC will tolerate 5 Mrads of total ionizing dose (TID) radiation due to the inherent radiation tolerance of the SiGe heterojunction bipolar transistors (HBT), 130 nm thin-oxide CMOS transistors, and standard radiation-hardening-by-design (RHBD) techniques. The ADC will be also sufficiently hardened against single-event effects (SEE).Ridgetop will fabricate and test the ADC in the IBM 130 nm BiCMOS SiGe process in Phase 2 of this SBIR program.

* Information listed above is at the time of submission. *

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