Unipolar nBn HgCdTe on Silicon for High Performance, Low Cost NIR/SWIR Imagers

Award Information
Agency:
Department of Defense
Branch
n/a
Amount:
$149,995.00
Award Year:
2012
Program:
SBIR
Phase:
Phase I
Contract:
H92222-12-P-0057
Award Id:
n/a
Agency Tracking Number:
S121-002-0008
Solicitation Year:
2012
Solicitation Topic Code:
SOCOM12-002
Solicitation Number:
2012.1
Small Business Information
590 Territorial Drive, Suite B, Bolingbrook, IL, -
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
068568588
Principal Investigator:
Jeremy Bergeson
Engineer
(630) 771-0203
contracts@epir.com
Business Contact:
Sivalingam Sivananthan
Chief Executive Officer
(630) 771-0201
ssivananthan@epir.com
Research Institution:
Stub




Abstract
We propose the development of a near infrared/shortwave infrared (NIR/SWIR) sensor based on mercury cadmium telluride (HgCdTe) in an n-type/barrier/n-type (nBn) architecture, designed for room-temperature operation in the 0.7 to 2.8µm NIR/SWIR spectral range. The sensor will compete as a low cost/high performance alternative to near infrared indium gallium arsenide (InGaAs)-based cameras by providing reduced fabrication costs and an extended detection wavelength range. The detectors will be composed of n-type and undoped HgCdTe material, which simplifies the manufacturing and lowers costs by eliminating the complications associated with p-type doping. This Phase I proposed effort will fabricate a prototype nBn HgCdTe NIR/SWIR sensors on silicon substrates with room-temperature spectral response from the silicon absorption band edge (~1.1µm) to 2.8µm. In Phase II, the nBn devices will be incorporated in high-resolution FPAs, and, with substrate removal, have responsivity from 0.7µm to 2.8µm. In the nBn architecture, HgCdTe has tremendous potential for advanced NIR/SWIR imaging applications that can realize an"out-of-band"capability advantage over InGaAs detectors while maintaining cost competitiveness because of the simplified processing of nBn devices as well as the low cost and large format of Si substrates.

* information listed above is at the time of submission.

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