Low thermal resistance two-phase cooling loop for aircraft thermal management

Award Information
Agency:
Department of Defense
Branch
n/a
Amount:
$149,931.00
Award Year:
2012
Program:
SBIR
Phase:
Phase I
Contract:
N68335-12-C-0050
Award Id:
n/a
Agency Tracking Number:
N112-093-0175
Solicitation Year:
2011
Solicitation Topic Code:
N112-093
Solicitation Number:
2011.2
Small Business Information
7100 Baltimore Avenue, Suite 300, College Park, MD, -
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
837268481
Principal Investigator:
John Lawler
President
(301) 699-1024
j.lawler@atec-ahx.com
Business Contact:
John Lawler
President
(301) 699-1024
j.lawler@atec-ahx.com
Research Institution:
Stub




Abstract
The trend of replacing mechanical drive systems with power electronics and electrical drives has led to significant increases in the on-board power requirements in military aircraft. Although electrical systems are typically highly efficient, still a significant portion of the electrical energy is eventually converted into heat, thus leading to thermal management challenges. Moreover, the efforts to outfit aircraft with directed energy weapons (DEW) heighten these challenges. Since these weapons are highly inefficient, a considerable portion of the input energy is converted into waste heat, and this heat must be efficiently removed in order to be able to deploy these DEW systems and other electronics on aircraft. We propose innovative two-phase heat sinks and condensers with very low thermal resistance, reduced coolant flow rate, and more uniform cooling over their surfaces. These heat exchangers contain manifolded microstructure surfaces that produce substantially higher heat transfer coefficients at lower pumping power than other geometries. This technology will result in lighter, more compact heat sinks and condensers, as well as reducing the volume and weight of the other components in the thermal management system. Honeywell Aerospace will work with us in developing performance specifications during Phase I and component testing during Phase II.

* information listed above is at the time of submission.

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