High-Speed, High-Fidelity, Reprogrammable Kernel for Use in Digital Radio Frequency Memory (DRFM) Systems and High-Speed Signal Digitization and Proce

Award Information
Agency: Department of Defense
Branch: Navy
Contract: N68936-12-C-0177
Agency Tracking Number: N121-034-0727
Amount: $149,756.00
Phase: Phase I
Program: SBIR
Awards Year: 2012
Solicitation Year: 2012
Solicitation Topic Code: N121-034
Solicitation Number: 2012.1
Small Business Information
10201 Fairfax Boulevard, Suite 300, Fairfax, VA, -
DUNS: 151209723
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Al Burgstahler
 Principle RF Engineer
 (703) 691-7767
Business Contact
 Bonnie Edwards
Title: Executive V.P.&Managing
Phone: (703) 691-7794
Email: bonnie@tridsys.com
Research Institution
Efforts to counter radar"s effectiveness include passive and active detection and deception techniques. Active radar deception techniques require accurate detection and characterization of the transmitted radar signals (time and spatial domains). Once identified as hostile, active deception includes broad or narrow bandwidth noise jamming to reduce detection range and signal retransmission techniques that induce target range, angular, and velocity errors. Modern active radar deception systems are typically called Digital Radio Frequency Memory (DRFM) systems that operate by digitizing the received signal and storing a coherent copy in memory that, when needed, is replicated and retransmitted. As digital electronics signal conversion, generation, and processing technologies advance, radar and DRFM designs are increasingly implemented in software/firmware using Field Programmable Gate Arrays (FPGAs) that, with high dynamic range RF frequency Analog-to-Digital Converters (ADCs) and Digital-to-Analog Converters (DACs), support rapid advances in radar waveforms and DRFM countermeasures. This proposal describes Trident"s approach to utilize the flexibility of our new Reconfigurable, Adaptive, Programmable, Tactical, Open Radar (RAPTOR) system as the compact operational prototype platform for a fully reprogrammable multi-channel DRFM kernel. Given RAPTOR"s maturity a prototype bench top test has been included during the Phase I to expedite a Phase II target system demonstration.

* Information listed above is at the time of submission. *

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