Advanced Bistatic Signal Processing and Exploitation

Award Information
Agency: Department of Defense
Branch: Navy
Contract: N68335-12-C-0116
Agency Tracking Number: N102-140-0728
Amount: $2,198,814.00
Phase: Phase II
Program: SBIR
Awards Year: 2012
Solicitation Year: 2010
Solicitation Topic Code: N102-140
Solicitation Number: 2010.2
Small Business Information
Information Systems Laboratories, Inc.
10070 Barnes Canyon Road, San Diego, CA, 92121-2722
DUNS: 107928806
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Jamie Bergin
 Vice President
 (860) 647-0036
 jsb@isl-inc.com
Business Contact
 Nicole Sanese
Title: Sr. Contract Administrato
Phone: (858) 373-2711
Email: nsanese@islinc.com
Research Institution
 Stub
Abstract
Bistatic radar processing by airborne signals intelligence (SIGINT) and other intelligence, surveillance, reconnaissance (ISR) platforms affords covert, passive exploitation of adversary or own-force radar systems to improve tactical situational awareness and fused intelligence products. Traditionally these bistatic signals have been ignored or unexploited by existing SIGINT/ELINT. The bistatic signals, however, contain a rich set of radar returns from both targets and cultural and natural features (i.e., clutter) that can be used to improve emitter geolocation as well as provide covert surveillance of enemy aircraft. Exploiting the bistatic signals, however, requires both novel signal processing algorithms and advanced processing architectures that can meet the challenging computing requirements for extracting the information contained in the bistatic returns. Under a successful Phase I effort, ISL established feasibility of the bistatic processing concept by showing that advanced intelligence products can be extracted from the bistatic clutter returns in a computer with a form factor that is appropriate for integration on an airborne SIGINT collection platform. The proposed Phase II program will refine the processing concept developed in Phase I and show that it can be implemented in low-cost hardware.

* information listed above is at the time of submission.

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