Incorporation of trust into integrated circuit (IC) and field programmable gate array (FPGA) design

Award Information
Agency: Department of Defense
Branch: Army
Contract: W31P4Q-12-C-0129
Agency Tracking Number: O2-1210
Amount: $749,970.00
Phase: Phase II
Program: SBIR
Awards Year: 2012
Solicitation Year: 2010
Solicitation Topic Code: OSD10-A07
Solicitation Number: 2010.2
Small Business Information
1245 LYONS RD, STE G, Dayton, OH, -
DUNS: 031764616
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: Y
Principal Investigator
 Paul Simon
 Senior Developer I
 (937) 281-0792
 p.simon@edaptive.com
Business Contact
 Praveen Chawla
Title: CEO
Phone: (937) 281-0790
Email: p.chawla@edaptive.com
Research Institution
 Stub
Abstract
As designs continue to progress in complexity, integration of third party assets has become a standard practice in hardware designs. Third party design integration, while reducing the complexity of the design process, always introduces risk in terms of the access to the internal components. These introduced elements are sometimes enclosed in a black-box, where system integrators cannot peek. Through the application of the VT-IP solution, we provide a framework for allowing more visibility and control over the functionality of integrated designs into FPGA hardware. The solution also provides a methodology for protecting critical device elements from adverse behavior in a third party design. The resulting capabilities will result in a marked increase in trust for FPGA integrators.

* Information listed above is at the time of submission. *

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