Digital Silicon Photomultiplier Readout Circuit
Department of Energy
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Small Business Information
15985 NW Schendel Avenue, Beaverton, OR, 97006-6703
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AbstractSiPMs have received significant investigation over recent years, because they offer potential as a solid-state single- photon-sensitive alternative to photomultipliers (PMTs), but their performance does not meet the needs of science, and there are no commercial fabs capable of manufacturing them at low cost. An important feature of SiPM technology is that it is possible to integrate the electronics into the SiPM itself, which reduces cost and improves performance, though most current SiPMs do not have integrated electronics. But it is widely recognized that this is the approach that makes sense in the long run for many applications. It improves performance and reduces cost, and can be tailored to a specific application. However, today, SiPMs are not made using process compatible with contemporary CMOS. A large-format digital readout integrated circuit (ROIC) will be developed that is optimize for silicon Geiger mode (Gm) avalanche photodiode (APD) arrays used in position-sensitive particle and gamma-ray tracking devices to realize the need for a flexible, high performance, and low cost silicon photomultiplier detectors. The proposed digital silicon photomultiplier (DSPAD) ROICS will overcome the deficiencies of the current generation of silicon photomultipliers (SiPMs). A DSPAD ROIC will be developed that is compatible with small sized SPAD microcells. The ROIC will contain in- microcell features aimed at addressing the aforementioned SiPM limitations, and integrate functionality within each microcell aimed at increasing the DSPADs applicability, including active quenching circuits, fusing, bias non- uniformity correction (NUC), and threshold comparators. In each pixel will be a time-to-digital converter (TDC) and hit counter. The DSPADs architecture will be developed in Phase I. After the architecture has been developed and specifications approved, the DSPAD microcell and device-level functional circuits will be designed, laid out, extracted, and simulated. A preliminary design review (PDR) will then be conducted to review the devices performance, yield estimates, and cost estimated. This will facilitate fabricating a fully-function DSPAD and demonstrating its performance with SPAD arrays in Phase II. Commercial Applications: The need for domestic sources of improved-performance SiPM arrays is important for the advancement of science as they are proving to be invaluable for measuring studying intracellular process or adaptive optics for extremely large telescopes, and numerous other applications. Applications include Chenkoc detectors, gamma cameras, nuclear imaging (PET/SPECT) and astrophysics.
* information listed above is at the time of submission.