Low Cost Universal Reliability System On-A-Chip for Multi-Channel Characterization
Small Business Information
Ultra Communications Inc
990 Park Center Drive, Suite H, Vista, CA, -
AbstractABSTRACT: Close-in sensors can be used to embed reliability and functional RF test capability directly on to RF chips in order to reduce the cost and complexity associated with carrying out reliability studies and product characterization. Recent advancements in silicon technology have enabled the development of close-in sensors and stimulus components ranging from direct current (DC) to RF signals. One can envision a universal reliability system on-a-chip (RFRELIC) for RF characterization where DC and AC sensors/stimulus may be implemented monolithically to realize a low cost system. This proposal proposes a suite of test structures, stimuli and sensors to embed test capability directly into integrated circuits. BENEFIT: This technology has potential to revolutionize assessing complex electronics for military use. Integration of voltage regulation to supply the necessary voltages and waveforms to multiple channels; on-chip RF sources for input stimuli; and digital controllers and monitors to coordinate testing activities such as supplying power to the Device Under Test (DUT) and capturing device performance simultaneously as the stressors are being applied is possible. Beyond HTOL and acceptance testing on-chip, on-chip Built-In-Test (BIT) has other applications to increase system reliability. An integrated circuit can monitor and report state of health. In the event that a circuit within a chip has failed, the chip would re-route to an alternate parallel path and greatly extending the reliability of the chip. For example if an amplifier failed, you could switch to a parallel amplifier. If a duplicate circuit does not exist, the signal could still be re-routed to an alternate path which might yield result in a soft failure versus non-operating condition. The additional cost/size of Built-In-Test (BIT) and parallel paths in RF integrated circuit processes will be minimal given today"s scale of integration.
* information listed above is at the time of submission.