Ultra-Broadband, High Dynamic Range Receiver System
Department of Defense
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Small Business Information
2972 W. Katapa Trail, Tucson, AZ, 85742-4806
Socially and Economically Disadvantaged:
AbstractThe objective of this proposal is to demonstrate the feasibility of an ultra-broadband, high dynamic range receiver system for signal capture, storage, and analysis. The significance of this innovation lies in generating significant cost savings in testing military receiver systems through stimulation via playback of high-fidelity recordings at RF frequencies. Optimization and testing can now be performed in a laboratory environment eliminating the need for much more expensive in-flight testing. As Alphacore, Inc., we are proposing a novel receiver system based on a selection of commercial off-the-shelf (COTS) photonic and electronic components. The ready availability of these components reduces the development cost and shortens the schedule compared to custom integrated circuit (ICs) or photonic components that would have to be developed otherwise. The critical component of our system is a photonics assisted frequency down converter (Photonic Mixer) that maintains a spurious-free dynamic range (SFDR) of at least 50dB higher than the electronic alternatives of the same bandwidth range. The mixer stage is followed by a Photonic Channelizer that divides the wide-band RF signal into 24 low bandwidth decoupled signals. Jitter being the main bottleneck inhibiting the combined high bandwidth and high resolution analog to digital conversion, this division carried out by a passive photonic structure is virtually a jitter free operation. The parallel low bandwidth photonic signals will then be converted to 250MHz electrical signals that can accurately be digitized with an array of commercial state-of-the-art 14-bit, 500 MSps (megasamples per second) electronic analog-to-digital converters (ADCs). The ADC outputs will be collected, conditioned and reframed through one or more FPGAs and further stored in a solid state disk (SSD)-based high-speed, high-capacity memory sub-system. The goal is the capability of storing more than 15 minutes of uninterrupted data from the receiver.
* information listed above is at the time of submission.